Inventor
BLINICK STEPHEN L
US31 patents
⚠️ This page may combine multiple inventors who share the name “BLINICK STEPHEN L”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
19 patentsUS8935462B2Jan 13, 2015
Promotion of partial data segments in flash cache
IBM6 citations84
US7870417B2Jan 11, 2011
Apparatus, system, and method for adapter card failover
IBM7 citations84
US7669050B2Feb 23, 2010
Method to enable user mode process to operate in a privileged execution mode
IBM11 citations84
US9152599B2Oct 6, 2015
Managing cache memories
IBM5 citations73
US8775867B2Jul 8, 2014
Method and system for using a standby server to improve redundancy in a dual-node data storage system
IBM4 citations72
US7340595B2Mar 4, 2008
Multiplex execution-path system
IBM8 citations72
US10049050B2Aug 14, 2018
Locking a cache line for write operations on a bus
IBM2 citations71
US9436607B2Sep 6, 2016
Locking a cache line for write operations on a bus
IBM1 citations61
US9208094B2Dec 8, 2015
Managing and sharing storage cache resources in a cluster environment
IBM3 citations60
US9417808B2Aug 16, 2016
Promotion of partial data segments in flash cache
IBM0 citations52
US9274975B2Mar 1, 2016
Management of partial data segments in dual cache systems
IBM0 citations52
US9176884B2Nov 3, 2015
Promotion of partial data segments in flash cache
IBM0 citations52
US9086979B2Jul 21, 2015
Management of partial data segments in dual cache systems
IBM0 citations52
US8719494B2May 6, 2014
Management of partial data segments in dual cache systems
IBM0 citations52
US7596651B2Sep 29, 2009
Multi-character adapter card
IBM1 citations52
US9372702B2Jun 21, 2016
Non-disruptive code update of a single processor in a multi-processor computing system
IBM0 citations51
US10331568B2Jun 25, 2019
Locking a cache line for write operations on a bus
IBM0 citations48
US7934045B2Apr 26, 2011
Redundant and fault tolerant control of an I/O enclosure by multiple hosts
IBM0 citations41
US9086972B2Jul 21, 2015
Managing metadata for caching devices during shutdown and restart procedures
IBM0 citations38
BENHASE MICHAEL T
6 patentsUS8972662B2Mar 3, 2015
Dynamically adjusted threshold for population of secondary cache
BENHASE MICHAEL T8 citations84
US8688914B2Apr 1, 2014
Promotion of partial data segments in flash cache
BENHASE MICHAEL T4 citations84
US8688913B2Apr 1, 2014
Management of partial data segments in dual cache systems
BENHASE MICHAEL T11 citations84
US8935479B2Jan 13, 2015
Adaptive cache promotions in a two level caching system
BENHASE MICHAEL T5 citations73
US8972661B2Mar 3, 2015
Dynamically adjusted threshold for population of secondary cache
BENHASE MICHAEL T2 citations63
US8930624B2Jan 6, 2015
Adaptive cache promotions in a two level caching system
BENHASE MICHAEL T1 citations52
BLINICK STEPHEN L
5 patentsUS9075720B2Jul 7, 2015
Locking a cache line for write operations on a bus
BLINICK STEPHEN L5 citations81
US8898653B2Nov 25, 2014
Non-disruptive code update of a single processor in a multi-processor computing system
BLINICK STEPHEN L2 citations61
US8782464B2Jul 15, 2014
Method and system for using a standby server to improve redundancy in a dual-node data storage system
BLINICK STEPHEN L3 citations60
US8136113B2Mar 13, 2012
Method and apparatus for adjusting sleep time of fixed high-priority threads
BLINICK STEPHEN L0 citations44
US8407710B2Mar 26, 2013
Systems and methods for dynamically scanning a plurality of active ports for priority schedule of work
BLINICK STEPHEN L0 citations39