Inventor

GRINCHUK MIKHAIL I

US33 patents

⚠️ This page may combine multiple inventors who share the name “GRINCHUK MIKHAIL I”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GRINCHUK MIKHAIL I

LSI LOGIC CORP

Method and apparatus for adaptive timing optimization of an integrated circuit design

Virtual tree-based netlist model and method of delay estimation for an integrated circuit design

Multiplier for modular exponentiation

Segmented addressable scan architecture and method for implementing scan-based testing of integrated circuits

Fault repair controller for redundant memory integrated circuits

Cell pin extensions for integrated circuits

Process for designing comparators and adders of small depth

Process for fast cell placement in integrated circuit design

Methods for using checksums in X-tolerant test response compaction in scan-based testing of integrated circuits

System and method for implementing postponed quasi-masking test output compression in integrated circuit

Sparce-redundant fixed point arithmetic modules

Effective approximated calculation of smooth functions

LSI CORP

Low density parity check decoder with miscorrection handling

Irregular low density parity check decoder with low syndrome error handling

Systems and methods for penalty based multi-variant encoding

High performance arithmetic logic unit (ALU) for cryptographic applications with built-in countermeasures against side channel attacks

Multimode block cipher architectures

Converter circuit for converting 1-redundant representation of an integer

Efficient implementations of the threshold-2 function

Efficient hardware implementation of tweakable block cipher

GRINCHUK MIKHAIL I

Data shredding RAID mode

High throughput frame check sequence module architecture

Low depth circuit design

Low depth circuit design

BOLOTOV ANATOLI A

Unified architecture for crypto functional units

Architecture and implementation method of programmable arithmetic controller for cryptographic applications

DIFFIE WHITFIELD

Symmetric NAT traversal for direct communication in P2P networks when some of the routing NATs are symmetric

YANG SHAOHUA

Systems and methods for locating and correcting decoder mis-corrections

INTEL CORP

High speed flexible packet classification using network processors

HAN YANG

Correcting errors in miscorrected codewords using list decoding

SEAGATE TECHNOLOGY LLC

Decoding based on randomized hard decisions

ZHANG FAN

Systems and methods for local iteration determination during delay processing

GASHKOV SERGEY B

Low depth combinational finite field multiplier