Inventor

WAKCHAURE YOGESH B

US37 patents

⚠️ This page may combine multiple inventors who share the name “WAKCHAURE YOGESH B”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WAKCHAURE YOGESH B

INTEL CORP

Resuming storage die programming after power loss

Methods and apparatus to preserve data of a solid state drive during a power loss event

Techniques for improving reliability and performance of partially written memory blocks in modern flash memory systems

Method, system, and apparatus for nested suspend and resume in a solid state drive

Independent NAND memory operations by plane

Methods and apparatus to configure performance of a solid state drive based on host write bandwidth

Methods and apparatus to preserve data of a solid state drive during a power loss event

Methods and apparatus to perform erase-suspend operations in memory devices

Method and apparatus for reducing read latency for a block erasable non-volatile memory

Method and apparatus for improving immunity to defects in a non-volatile memory

Data integrity management in memory systems

Error corrected pre-read for upper page write in a multi-level cell memory

Extended select gate lifetime

Methods and apparatus to perform erase-suspend operations in memory devices

Method, system, and apparatus for multi-tiered progressive memory program operation suspend and resume

Memory programming techniques

Read disturb tracking based on statistical probability

Methods and apparatus to configure performance of a solid state drive based on host write bandwidth

Proactive reduction of re-read triggering

Method, system, and apparatus for nested suspend and resume in a solid state drive

Lower page read for multi-level cell memory

Extended select gate lifetime

Techniques for improving reliability and performance of partially written memory blocks in modern flash memory systems

Lower page read for multi-level cell memory

Read quality of service for non-volatile memory

Technology to dynamically modulate memory device read granularity

SK HYNIX NAND PRODUCT SOLUTIONS CORP

Solid state drive with multiplexed internal channel access during program data transfers

Solid state drive with multiplexed internal channel access during program data transfers

Method and apparatus to improve read latency of a multi-threshold level cell block-based non-volatile memory

Solid state drive (SSD) with in-flight erasure iteration suspension

WAKCHAURE YOGESH B

Extended select gate lifetime

Method and system for using NAND page buffers to improve the transfer buffer utilization of a solid state drive

Erase management in memory systems

GUO XIN

Cycling endurance extending for memory cells of a non-volatile memory array

Defect management in memory systems

RUBY PAUL D

Dynamic read channel calibration for non-volatile memory devices

Intel NDTM US LLC

Dynamic program caching