Inventor
HAGLEITNER CHRISTOPH
CH40 patents
⚠️ This page may combine multiple inventors who share the name “HAGLEITNER CHRISTOPH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
23 patentsUS9558156B1Jan 31, 2017
Sparse matrix multiplication using a single field programmable gate array module
IBM85 citations95
US7885365B2Feb 8, 2011
Low-power, low-area high-speed receiver architecture
IBM35 citations92
US10685082B2Jun 16, 2020
Sparse matrix multiplication using a single field programmable gate array module
IBM21 citations91
US7521992B1Apr 21, 2009
Current-integrating amplifier
IBM15 citations84
US10008081B2Jun 26, 2018
Electronic devices with individual security circuits
IBM2 citations73
US9779061B2Oct 3, 2017
Iterative refinement apparatus
IBM2 citations71
US8386411B2Feb 26, 2013
Method and device for distributing patterns to scanning engines for scanning patterns in a packet stream
IBM5 citations70
US10388127B2Aug 20, 2019
Electronic devices with individual security circuits
IBM1 citations62
US9276579B2Mar 1, 2016
Nano-electro-mechanical-switch adiabatic dynamic logic circuits
IBM2 citations62
US7492301B1Feb 17, 2009
Low power to analog to digital converter with small input capacitance
IBM5 citations62
US12461943B1Nov 4, 2025
Refinement of large multi-dimensional search spaces
IBM0 citations60
US11783200B2Oct 10, 2023
Artificial neural network implementation in field-programmable gate arrays
IBM1 citations60
US11175957B1Nov 16, 2021
Hardware accelerator for executing a computation task
IBM1 citations59
US10832538B2Nov 10, 2020
Electronic devices with individual security circuits
IBM0 citations52
US9582472B2Feb 28, 2017
Conjugate gradient solvers for linear systems
IBM1 citations51
US9575930B2Feb 21, 2017
Conjugate gradient solvers for linear systems
IBM0 citations51
US9276578B2Mar 1, 2016
Nano-electro-mechanical-switch adiabatic dynamic logic circuits
IBM1 citations51
US8963661B2Feb 24, 2015
Four terminal nano-electromechanical switch with a single mechanical contact
IBM0 citations51
US8925183B2Jan 6, 2015
Methods for fabricating an electromechanical switch
IBM0 citations51
US10025754B2Jul 17, 2018
Linear FE system solver with dynamic multi-grip precision
IBM0 citations49
US11630696B2Apr 18, 2023
Messaging for a hardware acceleration system
IBM0 citations48
US9983876B2May 29, 2018
Non-deterministic finite state machine module for use in a regular expression matching system
IBM0 citations40
US10169487B2Jan 1, 2019
Graph data representation and pre-processing for efficient parallel search tree traversal
IBM0 citations36
BIRAN GIORA
10 patentsUS8799188B2Aug 5, 2014
Algorithm engine for use in a pattern matching accelerator
BIRAN GIORA7 citations84
US8402003B2Mar 19, 2013
Performance monitoring mechanism for use in a pattern matching accelerator
BIRAN GIORA11 citations84
US8635180B2Jan 21, 2014
Multiple hash scheme for use in a pattern matching accelerator
BIRAN GIORA3 citations62
US8495334B2Jul 23, 2013
Address translation for use in a pattern matching accelerator
BIRAN GIORA3 citations62
US8478736B2Jul 2, 2013
Pattern matching accelerator
BIRAN GIORA2 citations62
US8447749B2May 21, 2013
Local results processor for use in a pattern matching accelerator
BIRAN GIORA3 citations62
US8423533B2Apr 16, 2013
Multiple rule bank access scheme for use in a pattern matching accelerator
BIRAN GIORA3 citations62
US8412722B2Apr 2, 2013
Upload manager for use in a pattern matching accelerator
BIRAN GIORA2 citations62
US8966182B2Feb 24, 2015
Software and hardware managed dual rule bank cache for use in a pattern matching accelerator
BIRAN GIORA1 citations52
US8983891B2Mar 17, 2015
Pattern matching engine for use in a pattern matching accelerator
BIRAN GIORA0 citations41
ATASU KUBILAY
3 patentsUS8688608B2Apr 1, 2014
Verifying correctness of regular expression transformations that use a post-processor
ATASU KUBILAY4 citations70
US8620968B2Dec 31, 2013
Determination and handling of subexpression overlaps in regular expression decompostions
ATASU KUBILAY6 citations67
US9246928B2Jan 26, 2016
Compiling pattern contexts to scan lanes under instruction execution constraints
ATASU KUBILAY2 citations56