Inventor
AMER MAHER
CA32 patents
⚠️ This page may combine multiple inventors who share the name “AMER MAHER”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
RAMBUS INC
10 patentsUS10580465B2Mar 3, 2020
System and method for providing a configurable timing control for a memory system
RAMBUS INC7 citations83
US10168954B2Jan 1, 2019
System and method of interfacing co-processors and input/output devices via a main memory system
RAMBUS INC1 citations72
US11789662B2Oct 17, 2023
System and method of interfacing co-processors and input/output devices via a main memory system
RAMBUS INC0 citations62
US11422749B2Aug 23, 2022
System and method of interfacing co-processors and input/output devices via a main memory system
RAMBUS INC0 citations62
US10942682B2Mar 9, 2021
System and method of interfacing co-processors and input/output devices via a main memory system
RAMBUS INC0 citations62
US11640836B2May 2, 2023
System and method for providing a configurable timing control for a memory system
RAMBUS INC0 citations61
US11062743B2Jul 13, 2021
System and method for providing a configurable timing control for a memory system
RAMBUS INC0 citations61
US11061841B2Jul 13, 2021
System and method for implementing a multi-threaded device driver in a computer system
RAMBUS INC1 citations60
US10725704B2Jul 28, 2020
System and method of interfacing co-processors and input/output devices via a main memory system
RAMBUS INC0 citations51
US10719466B2Jul 21, 2020
System and method for implementing a multi-threaded device driver in a computer system
RAMBUS INC0 citations50
DIABLO TECH INC
6 patentsUS9552175B2Jan 24, 2017
System and method for providing a command buffer in a memory system
DIABLO TECH INC17 citations83
US9444495B2Sep 13, 2016
System and method of interfacing co-processors and input/output devices via a main memory system
DIABLO TECH INC4 citations83
US9449651B2Sep 20, 2016
System and method for offsetting the data buffer latency of a device implementing a JEDEC standard DDR-4 LRDIMM chipset
DIABLO TECH INC3 citations71
US9779020B2Oct 3, 2017
System and method for providing an address cache for memory map learning
DIABLO TECH INC0 citations51
US9575908B2Feb 21, 2017
System and method for unlocking additional functions of a module
DIABLO TECH INC1 citations51
US9465557B2Oct 11, 2016
Load reduction dual in-line memory module (LRDIMM) and method for programming the same
DIABLO TECH INC0 citations50
AMER MAHER
5 patentsUS8452917B2May 28, 2013
Load reduction dual in-line memory module (LRDIMM) and method for programming the same
AMER MAHER64 citations96
US8107357B2Jan 31, 2012
Optimized FFT/IFFT module
AMER MAHER2 citations62
US7765457B2Jul 27, 2010
Parallel convolutional encoder
AMER MAHER3 citations62
US7623585B2Nov 24, 2009
Systems and modules for use with trellis-based decoding
AMER MAHER2 citations62
US7185268B2Feb 27, 2007
Memory system and method for use in trellis-based decoding
AMER MAHER2 citations62
ZARBANA DIGITAL FUND LLC
4 patentsUS7333422B2Feb 19, 2008
Optimized FFT/IFFT module
ZARBANA DIGITAL FUND LLC45 citations92
US7415112B2Aug 19, 2008
Parallel scrambler/descrambler
ZARBANA DIGITAL FUND LLC7 citations73
US7917835B2Mar 29, 2011
Memory system and method for use in trellis-based decoding
ZARBANA DIGITAL FUND LLC0 citations52
US7318189B2Jan 8, 2008
Parallel convolutional encoder
ZARBANA DIGITAL FUND LLC0 citations52
DIABLO TECHNOLOGIES INC
3 patentsUS8738853B2May 27, 2014
Load reduction dual in-line memory module (LRDIMM) and method for programming the same
DIABLO TECHNOLOGIES INC67 citations96
US9015408B2Apr 21, 2015
Load reduction dual in-line memory module (LRDIMM) and method for programming the same
DIABLO TECHNOLOGIES INC6 citations82
US8972805B2Mar 3, 2015
System and method of interfacing co-processors and input/output devices via a main memory system
DIABLO TECHNOLOGIES INC1 citations62
MOSAID TECHNOLOGIES INC
3 patentsUS6728744B2Apr 27, 2004
Wide word multiplier using booth encoding
MOSAID TECHNOLOGIES INC11 citations74
US6766346B2Jul 20, 2004
System and method for computing a square of a number
MOSAID TECHNOLOGIES INC4 citations63
US6141289AOct 31, 2000
Structure of random access memory formed of multibit cells
MOSAID TECHNOLOGIES INC4 citations63