Inventor

OUYANG XU

CN46 patents

⚠️ This page may combine multiple inventors who share the name “OUYANG XU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

OUYANG XU

CORNING INC

Process for making of glass articles with optical and easy-to-clean coatings

Durable anti-reflective articles

Deadfront configured for color matching

Durable anti-reflective articles

Hermetically sealed package

Process for making of glass articles with optical and easy-to-clean coatings

Light guide-based deadfront for display, related methods and vehicle interior systems

Deadfront for displays including a touch panel on decorative glass and related methods

Light guide-based deadfront for display, related methods and vehicle interior systems

Decorated glass having a printed ink layer

Carrier wafers and methods of forming carrier wafers

Aperture structure for optical windows and devices

Deadfront articles with multi-layer optical structures and associated methods

IBM

Method to determine the root causes of failure patterns by using spatial correlation of tester data

Memory array peripheral structures and use

Method for compensating for tool processing variation in the routing of wafers/lots

Process for making a MCSFET

Multidimensional process window optimization in semiconductor manufacturing

Method of adaptively selecting chips for reducing in-line testing in a semiconductor manufacturing line

Modularized three-dimensional capacitor array

Placement and optimization of process dummy cells

SRAM device, and SRAM device design structure, with adaptable access transistors

Defect-free hybrid orientation technology for semiconductor devices

Defect-free hybrid orientation technology for semiconductor devices

Computer program product for excluding variations attributable to equipment used in semiconductor wafer manufacturing from split analysis procedures

OUYANG XU

Placement and optimization of process dummy cells

Method for optimizing the routing of wafers/lots based on yield

Noncontact electrical testing with optical techniques

Detecting asymmetrical transistor leakage defects

LCR test circuit structure for detecting metal gate defect conditions

SEMITRONIX CORP

Programmable addressable test chip

Addressable ring oscillator test chip

Method for testing a plurality of transistors in a target chip

HSU LOUIS L

Modularized three-dimensional capacitor array

Modularized three-dimensional capacitor array

ROCHE SEQUENCING SOLUTIONS INC

Multi-chip packaging of integrated circuits and flow cells for nanopore sequencing

Multi-chip packaging of integrated circuits and flow cells for nanopore sequencing

HSU LOUIS C

Flash memory structure with enhanced capacitive coupling coefficient ratio (CCCR) and method for fabrication thereof

Flash memory structure with enhanced capacitive coupling coefficient ratio (CCCR) and method for fabrication thereof

NANOOPTO CORP

Films for optical use and methods of making such films

API NANOFABRICATION AND RES CO

Multilayer optical filter

HENG FOOK-LUEN

Geometry based electrical hotspot detection in integrated circuit layouts

CHAN YUEN H

Dual beta ratio SRAM

XIN YONGCHUN

Wafer alignment system with optical coherence tomography

HERSCHBEIN STEVEN B

Inline low-damage automated failure analysis

CORNING INCORPORATED

Cover substrates for displays with decorative layers having integrated logic circuits and methods of forming the same