Inventor
XIAO DE YUAN
CN17 patents
⚠️ This page may combine multiple inventors who share the name “XIAO DE YUAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SEMICONDUCTOR MFG INT SHANGHAI
9 patentsUS9209289B2Dec 8, 2015
Semiconductor device and fabrication method thereof
SEMICONDUCTOR MFG INT SHANGHAI3 citations61
US9029222B2May 12, 2015
Three-dimensional quantum well transistor and fabrication method
SEMICONDUCTOR MFG INT SHANGHAI2 citations61
US9224812B2Dec 29, 2015
System and method for integrated circuits with cylindrical gate structures
SEMICONDUCTOR MFG INT SHANGHAI3 citations60
US8053907B2Nov 8, 2011
Method and system for forming conductive bumping with copper interconnection
SEMICONDUCTOR MFG INT SHANGHAI2 citations60
US9269772B2Feb 23, 2016
Semiconductor device and fabrication method thereof
SEMICONDUCTOR MFG INT SHANGHAI0 citations51
US9093354B1Jul 28, 2015
Three-dimensional quantum well transistor
SEMICONDUCTOR MFG INT SHANGHAI0 citations51
US8889510B2Nov 18, 2014
Surrounding stacked gate multi-gate FET structure nonvolatile memory device
SEMICONDUCTOR MFG INT SHANGHAI0 citations51
US9373694B2Jun 21, 2016
System and method for integrated circuits with cylindrical gate structures
SEMICONDUCTOR MFG INT SHANGHAI1 citations49
US9136183B2Sep 15, 2015
Transistor device and fabrication method
SEMICONDUCTOR MFG INT SHANGHAI0 citations40
XIAO DE YUAN
4 patentsUS8884363B2Nov 11, 2014
System and method for integrated circuits with cylindrical gate structures
XIAO DE YUAN12 citations80
US8293635B2Oct 23, 2012
Method and system for forming conductive bumping with copper interconnection
XIAO DE YUAN3 citations59
US8581366B2Nov 12, 2013
Method and system for forming conductive bumping with copper interconnection
XIAO DE YUAN0 citations49
US8471323B2Jun 25, 2013
3-D electrically programmable and erasable single-transistor non-volatile semiconductor memory device
XIAO DE YUAN0 citations40
SEMICONDUCTOR MFG INT SHANGHAI CORP
3 patentsUS9922878B2Mar 20, 2018
Hybrid integrated semiconductor tri-gate and split dual-gate FinFET devices and method for manufacturing
SEMICONDUCTOR MFG INT SHANGHAI CORP0 citations51
US9437709B2Sep 6, 2016
Semiconductor device and fabrication method thereof
SEMICONDUCTOR MFG INT SHANGHAI CORP0 citations51
US9673060B2Jun 6, 2017
System and method for integrated circuits with cylindrical gate structures
SEMICONDUCTOR MFG INT SHANGHAI CORP0 citations49