Inventor

WACQUEZ ROMAIN

US24 patents

⚠️ This page may combine multiple inventors who share the name “WACQUEZ ROMAIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WACQUEZ ROMAIN

COMMISSARIAT ENERGIE ATOMIQUE

Digital-to-analogue converter and neuromorphic circuit using such a converter

Electronic device having a physical unclonable function identifier

Process for producing FET transistors

Method for modifying the strain state of a block of a semiconducting material

Coherent sampling true random number generation in FD-SOI technology

Method for treating the surface of a silicon substrate

Microelectronic device with isolation trenches extending under an active area

Method for producing a field effect transistor with a SiGe channel by ion implantation

Method for forming a non-volatile memory cell, non-volatile memory cell formed according to said method and microelectronic device comprising such memory cells

Method for fabricating microelectronic devices with isolation trenches partially formed under active regions

ST MICROELECTRONICS CROLLES 2

Transistor and fabrication process

Three-gate transistor structure

Transistor device with two planar gates and fabrication process

ST MICROELECTRONICS SA

Method for manufacturing a fin MOS transistor

Method for manufacturing a fin MOS transistor

ST MICROELECTRONICS INC

Method to co-integrate oppositely strained semiconductor devices on a same substrate

Method to co-integrate oppositely strained semiconductor devices on a same substrate

WACQUEZ ROMAIN

Method for producing stacked and self-aligned components on a substrate

Method for producing a three-dimensionally controlled surface coating in a cavity

CORONEL PHILIPPE

Method for manufacturing a transistor with parallel semiconductor nanofingers

COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT

Method of etching a crystalline semiconductor material by ion implantation and then chemical etching based on hydrogen chloride

COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENE ALT

Method for modifying the strain state of a block of a semiconducting material

VINET MAUD

Method of producing a microelectronic device in a monocrystalline semiconductor substrate with isolation trenches partially formed under an active region

GRENOUILLET LAURENT

Method for fabricating microelectronic devices with isolation trenches partially formed under active regions