Inventor
FOLBERTH HARALD
DE7 patents
Patents
7 patentsUS6237128B1May 22, 2001
Method and apparatus for enabling parallel layout checking of designing VLSI-chips
IBM22 citations89
US9384316B2Jul 5, 2016
Path-based congestion reduction in integrated circuit routing
IBM3 citations71
US11080456B2Aug 3, 2021
Automated design closure with abutted hierarchy
IBM4 citations66
US10616103B2Apr 7, 2020
Constructing staging trees in hierarchical circuit designs
IBM1 citations56
US6043436AMar 28, 2000
Wiring structure having rotated wiring layers
IBM3 citations56
US10831965B1Nov 10, 2020
Placement of vectorized latches in hierarchical integrated circuit development
IBM0 citations36
US10146899B1Dec 4, 2018
Clock control trees
IBM0 citations32