Inventor

GEPHARDT DOUGLAS D

US43 patents

⚠️ This page may combine multiple inventors who share the name “GEPHARDT DOUGLAS D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GEPHARDT DOUGLAS D

ADVANCED MICRO DEVICES INC

Power management architecture including a power management messaging bus for conveying an encoded activity signal for optimal flexibility

Interrupt controller with external in-service indication for power management within a computer system

Multiprocessing system employing an adaptive interrupt mapping mechanism and method

Dockable computer system capable of symmetric multi-processing operations

System for dynamically reconfiguring subbusses of data bus according to system needs based on monitoring each of the information channels that make up data bus

Processor with decompressed video bus

Dockable computer system capable of electric and electromagnetic communication

System for docking a portable computer to a host computer without suspending processor operation by a docking agent driving the bus inactive during docking

Side bus to dynamically off load main bus

Apparatus and method for driving a bus to a docking safe state in a dockable computer system including a docking station and a portable computer

Apparatus and method for achieving hot docking capabilities for a dockable computer system

Power management message bus for integrated processor

Non-volatile memory array controller capable of controlling memory banks having variable bit widths

Apparatus for use with a computing device controlling communications with a plurality of peripheral devices including a feedback bus to indicate operational modes

Apparatus and method for storing interrupt source information in an interrupt controller based upon interrupt priority

Multiprocessing interrupt controller on I/O bus

Interrupt controller optimized for power management in a computer system or subsystem

Reverse data channel as a bandwidth modulator

High performance derived local bus and computer system employing the same

System management mode and in-circuit emulation memory mapping and locking method

System for performing I/O access and memory access by driving address of DMA configuration registers and memory address stored therein respectively on local bus

High performance integrated processor architecture including a sub-bus control unit for generating signals to control a secondary, non-multiplexed external bus

System and method for re-starting a peripheral bus clock signal and requesting mastership of a peripheral bus

System for effecting communications between a computing device and a plurality of peripheral devices

System for reproducing images utilizing image libraries

Computer system selecting byte lane for a peripheral device during I/O addressing technique of disabling non-participating peripherals by driving an address within a range on the local bus in a DMA controller

Apparatus for controlling access to a data bus

System for controlling communications among a computer processing unit and a plurality of peripheral devices

Processor with decompressed video bus

Apparatus for managing system interrupt operations in a computing system

Integrated digital processing apparatus having a single biodirectional data bus for accommodating a plurality of peripheral devices connected to a plurality of external buses

Apparatus for use with a computing device for generating a substitute acknowledgement to an input when the computing device is in an operational hiatus

Apparatus and method for supporting a transfer trapping discipline for a non-enabled peripheral unit within a computing system

CHIENG DANIEL L

Systems and methods for controlling audio volume in the processor of a high definition audio codec

Systems and methods for booting a codec processor over a high definition audio bus

Systems and methods for shadowing an HDA codec

Systems and methods for overriding hardwired responses in an HDA codec

D2AUDIO CORP

Systems and methods for switching and mixing signals in a multi-channel amplifier

Streaming multi-channel audio as packetized data or parallel data with a separate input frame sync

Systems and methods for controlling HDA system capabilities

CIRRUS LOGIC INC

Circuits, system, and methods for processing multiple data streams

ADVANCED MICRO SYSTEMS INC

ROM chip enable encoding method and computer system employing the same

TAYLOR WILSON E

Systems and methods for controlling HDA system capabilities