Inventor

LIN TA-CHUN

TW67 patents

⚠️ This page may combine multiple inventors who share the name “LIN TA-CHUN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LIN TA-CHUN

TAIWAN SEMICONDUCTOR MFG CO LTD

Semiconductor devices having gate dielectric layers of varying thicknesses and methods of forming the same

Gate-all-around (GAA) method and devices

Deep trench spacing isolation for complementary metal-oxide-semiconductor (CMOS) image sensors

Reducing parasitic capacitance in field-effect transistors

Semiconductor structure with extended contact structure

Semiconductor devices having gate dielectric layers of varying thicknesses and methods of forming the same

Hybrid nanostructure and fin structure device

Semiconductor structures including standard cells and tap cells

Semiconductor device structure and method for forming the same

Method for manufacturing semiconductor structure with extended contact structure

Gate-all-around structure with dummy pattern top in channel region and methods of forming the same

Gate structure and method

Hybrid nanostructure and fin structure device

Semiconductor strutures with dielectric fins

Reducing parasitic capacitance in field-effect transistors

Semiconductor structure and methods of forming the same

Semiconductor devices and methods of manufacture

Structure and method for FinFET device with source/drain modulation

Isolation structures

Semiconductor devices having gate dielectric layers of varying thicknesses and methods of forming the same

Gate spacers and methods of forming the same in semiconductor devices

Semiconductor devices and methods of manufacture

Semiconductor structure and methods of forming the same

Gate structure and method

Structure and method for FinFET device with source/drain modulation

Reducing parasitic capacitance in field-effect transistors

Gate structure and method

Semiconductor device

Semiconductor device structure and method for forming the same

Isolation structure for isolating source/drain region structure from adjacent source/drain structure

Semiconductor device structure and method for forming the same

Semiconductor structure with extended contact structure

Isolation structure for preventing unintentional merging of epitaxially grown source/drain

Gate-all-around (GAA) method and devices

Isolation structure for isolating epitaxially grown source/drain regions and method of fabrication thereof

Gate structure and method with dielectric gates and gate-cut features

Isolation structure for preventing unintentional merging of epitaxially grown source/drain

Isolation structure for for isolating epitaxially grown source/drain regions and method of fabrication thereof

Isolation structure for preventing unintentional merging of epitaxially grown source/drain

Semiconductor structure and method for forming the same

Gate structure and method with dielectric gates and gate-cut features

Isolation with multi-step structure

Semiconductor device structure and method for forming the same

Isolation with multi-step structure

Method for forming isolation with multi-step structure

Semiconductor structure including gate spacer layer and dielectric layer having portion lower than top surface of gate spacer layer

Gate-top dielectric structure for self-aligned contact

AVERMEDIA TECH INC

Adapter device with resilient conductive means

Computer interface card

TAIWAN SEMICONDUCTOR MFG COMPANY LTD

Semiconductor device structure and methods of forming the same