Inventor

PEKARIK JOHN J

US94 patents

⚠️ This page may combine multiple inventors who share the name “PEKARIK JOHN J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

PEKARIK JOHN J

GLOBALFOUNDRIES US INC

Heterojunction bipolar transistor with buried trap rich isolation region

Thermally and electrically conductive interconnects

Trap-rich layer in a high-resistivity semiconductor layer

Heterojunction bipolar transistor

Heterojunction bipolar transistors with airgap isolation

Photodiodes integrated into a BiCMOS process

Heterojunction bipolar transistors with a cut stress liner

Heterojunction bipolar transistor with buried trap rich isolation region

Heterojunction bipolar transistor with emitter base junction oxide interface

Lateral bipolar transistor structure with base over semiconductor buffer and related method

Bipolar transistor structure with collector on polycrystalline isolation layer and methods to form same

Double mesa heterojunction bipolar transistor

Photodetectors with a lateral composition gradient

Metal-free fuse structures

Boolean temperature sensing using phase transition material

Field effect transistors with back gate contact and buried high resistivity layer

Wafer with crystalline silicon and trap rich polysilicon layer

Heterojunction bipolar transistor

Double mesa heterojunction bipolar transistor

Transistors with lattice structure

Transistor structure with overlying gate on polysilicon gate structure and related method

IBM

Hot-electron programmable latch for integrated circuit fuse applications and method of programming therefor

Curved FINFETs

Integrated circuit having pairs of parallel complementary FinFETs

Integrated circuit having pairs of parallel complementary FinFETs

Tunable breakdown voltage RF FET devices

Bipolar junction transistors with reduced base-collector junction capacitance

Method to bridge extrinsic and intrinsic base by selective epitaxy in BiCMOS technology

Bipolar junction transistors with reduced base-collector junction capacitance

Structure and method for fabrication JFET in CMOS

Semiconductor devices having torsional stresses

Semiconductor device and method of forming the device by forming monocrystalline semiconductor layers on a dielectric layer over isolation regions

Method and apparatus for improving integrated circuit device performance using hybrid crystal orientations

Self-aligned emitter-base-collector bipolar junction transistors with a single crystal raised extrinsic base

Method to bridge extrinsic and intrinsic base by selective epitaxy in BiCMOS technology

GLOBALFOUNDRIES INC

Optical switches and routers operated by phase-changing materials controlled by heaters

Structures with an airgap and methods of forming such structures

Heterojunction bipolar transistor with emitter base junction oxide interface

Optical beam steering with directionality provided by switched grating couplers

Compact device structures for a bipolar junction transistor

Heterojunction bipolar transistor with a thickened extrinsic base

Bipolar transistor with extrinsic base region and methods of fabrication

Bipolar junction transistors with a self-aligned emitter and base

Dual thickness fuse structures

Dual thickness fuse structures

Self-aligned emitter-base-collector bipolar junction transistors with a single crystal raised extrinsic base

GLOBALFOUNDRIES SG PTE LTD

Heat sink for face bonded semiconductor device

Bipolar transistors

LASSERRE SEBASTIEN

Method for fabricating high-gain MOSFETs with asymmetric source/drain doping for analog and RF applications

ADKISSON JAMES W

Bipolar transistor with a raised collector pedestal for reduced capacitance