Inventor

SWAINE ANDREW BROOKFIELD

GB58 patents

⚠️ This page may combine multiple inventors who share the name “SWAINE ANDREW BROOKFIELD”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SWAINE ANDREW BROOKFIELD

ADVANCED RISC MACH LTD

Tracing multiple data access instructions

Trace source correlation in a data processing apparatus

Tracing out-of-order data

Apparatus and method for facilitating debugging of sequences of processing instructions using context identifier comparison

Cross-triggering of processing devices

Multi-range lookup in translation lookaside buffer

Packing trace protocols within trace streams

Trace data timestamping

Instruction tracing in data processing systems

Data processing system trace bus

Test access control for secure integrated circuits

Asynchronous FIFO apparatus and method for passing data between a first clock domain and a second clock domain and a second clock domain of a data processing apparatus

Diagnostic mechanisms within multi processing systems

Memory management unit with address translation cache

Address translation cache partitioning

Access control

Trace data source identification within a trace data stream

Filtering coherency protocol transactions

Apparatus and method for handling accesses targeting a memory

Controlling transitions of devices between normal state and quiescent state

Forced diagnostic entry upon power-up

Apparatus and method for processing burst read transactions

Performing diagnostic operations upon a data processing apparatus with power down support

Technique for controlling stashing of data

Technique for tracking modification of content of regions of memory

Cache replacement control

Translation lookaside buffer invalidation

Address translation cache with use of page size information to select an invalidation lookup mode, or use of leaf-and-intermediate exclusive range-specifying invalidation request, or use of invalidation request specifying single address and page size information

Memory management

Memory access transaction with security check indication

Cache arrangements for data processing systems

Memory management circuitry managing data transactions and address translations between an upstream device and a downstream device

Identifier selection

Techniques for generating a trace stream for a data processing apparatus

Apparatus and method using plurality of physical address spaces

Epoch-based determination of completion of barrier termination command

Recovering pending trace data within a data processing system

Memory synchronisation subsequent to a page table walk

Controlling memory access in a data processing systems with multiple subsystems

Read-if-hit-pre-PoPA request

Variable nesting control parameter for table structure providing access control information for controlling access to a memory system

HORLEY JOHN MICHAEL

Trace synchronization

Triggering diagnostic operations within a data processing apparatus

Identifier selection

Trace synchronization

Techniques for generating a trace stream for a data processing apparatus

SWAINE ANDREW BROOKFIELD

Generation of trace data in a multi-processor system

WILLIAMS MICHAEL JOHN

Diagnostic context construction and comparison