Inventor

GOLONZKA OLEG

US83 patents

⚠️ This page may combine multiple inventors who share the name “GOLONZKA OLEG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GOLONZKA OLEG

INTEL CORP

Method of forming stacked trench contacts and structures formed thereby

Method of forming stacked trench contacts and structures formed thereby

Method of forming stacked trench contacts and structures formed thereby

Method of forming stacked trench contacts and structures formed thereby

Method of forming stacked trench contacts and structures formed thereby

Dual salicide integration for salicide through trench contacts and structures formed thereby

Pattern decomposition lithography techniques

Metallization in integrated circuit structures

Enhanced nitride layers for metal oxide semiconductors

Gate-all-around integrated circuit structures having adjacent structures for sub-fin electrical contact

Gate-all-around integrated circuit structures having adjacent structures for sub-fin electrical contact

Gate-all-around integrated circuit structures having devices with source/drain-to-substrate electrical contact

Gate-all-around integrated circuit structures having devices with channel-to-substrate electrical contact

Method of forming stacked trench contacts and structures formed thereby

Techniques for forming logic including integrated spin-transfer torque magnetoresistive random-access memory

Electrical contacts for magnetoresistive random access memory devices

PSTTM device with bottom electrode interface material

PSTTM device with multi-layered filter stack

Perpendicular spin transfer torque memory (pSTTM) devices with enhanced stability and method to form same

Pattern decomposition lithography techniques

Wrap-around trench contact structure and methods of fabrication

Pattern decomposition lithography techniques

Texture breaking layer to decouple bottom electrode from PMTJ device

Integrated circuit structures having metal gates with tapered plugs

Magnetic memory devices and methods of fabrication

RRAM devices with reduced forming voltage

Methods of forming a magnetic random access memory etch spacer and structures formed thereby

Method of forming stacked trench contacts and structures formed thereby

Gate aligned contact and method to fabricate same

Gate aligned contact and method to fabricate same

Gate aligned contact and method to fabricate same

Method of forming stacked trench contacts and structures formed thereby

Gate aligned contact and method to fabricate same

Wrap-around trench contact structure and methods of fabrication

Fabrication of gate-all-around integrated circuit structures having additive metal gates and gate dielectrics with a dipole layer

Wrap-around trench contact structure and methods of fabrication

Approaches for strain engineering of perpendicular magnetic tunnel junctions (pMTJs) and the resulting structures

Interconnect capping process for integration of MRAM devices and the resulting structures

Gate-all-around integrated circuit structures having devices with channel-to-substrate electrical contact

Gate-all-around integrated circuit structures having devices with source/drain-to-substrate electrical contact

Pattern decomposition lithography techniques

Gate-all-around integrated circuit structures having adjacent deep via substrate contacts for sub-fin electrical contact

Conductive alloy layer in magnetic memory devices and methods of fabrication

Magnetic memory devices and methods of fabrication

Resistive random access memory device and methods of fabrication

GOLONZKA OLEG

Gate aligned contact and method to fabricate same

Methods of channel stress engineering and structures formed thereby

SELL BERNHARD

Method of forming stacked trench contacts and structures formed thereby

STEIGERWALD JOSEPH

Wrap-around trench contact structure and methods of fabrication

WALLACE CHARLES H

Pattern decomposition lithography techniques