Inventor
VOLDMAN STEVEN H
US204 patents
Patents
50 patentsUS6433609B1Aug 13, 2002
Double-gate low power SOI active clamp network for single power supply and multiple power supply applications
IBM188 citations99
US6232163B1May 15, 2001
Method of forming a semiconductor diode with depleted polysilicon gate structure
IBM136 citations99
US5811857ASep 22, 1998
Silicon-on-insulator body-coupled gated diode for electrostatic discharge (ESD) and analog applications
IBM167 citations99
US5629544AMay 13, 1997
Semiconductor diode with silicide films and trench isolation
IBM202 citations99
US6404269B1Jun 11, 2002
Low power SOI ESD buffer driver networks having dynamic threshold MOSFETS
IBM79 citations98
US6288426B1Sep 11, 2001
Thermal conductivity enhanced semiconductor structures and fabrication processes
IBM87 citations98
US6236103B1May 22, 2001
Integrated high-performance decoupling capacitor and heat sink
IBM93 citations98
US6096584AAug 1, 2000
Silicon-on-insulator and CMOS-on-SOI double film fabrication process with a coplanar silicon and isolation layer and adding a second silicon layer on one region
IBM105 citations98
US6034388AMar 7, 2000
Depleted polysilicon circuit element and method for producing the same
IBM87 citations98
US6015993AJan 18, 2000
Semiconductor diode with depleted polysilicon gate structure and method
IBM106 citations98
US5889293AMar 30, 1999
Electrical contact to buried SOI structures
IBM103 citations98
US6628159B2Sep 30, 2003
SOI voltage-tolerant body-coupled pass transistor
IBM52 citations96
US6498385B1Dec 24, 2002
Post-fuse blow corrosion prevention structure for copper fuses
IBM68 citations96
US6455902B1Sep 24, 2002
BiCMOS ESD circuit with subcollector/trench-isolated body mosfet for mixed signal analog/digital RF applications
IBM74 citations96
US6433985B1Aug 13, 2002
ESD network with capacitor blocking element
IBM56 citations96
US6429045B1Aug 6, 2002
Structure and process for multi-chip chip attach with reduced risk of electrostatic discharge damage
IBM74 citations96
US6369994B1Apr 9, 2002
Method and apparatus for handling an ESD event on an SOI integrated circuit
IBM70 citations96
US6187617B1Feb 13, 2001
Semiconductor structure having heterogeneous silicide regions and method for forming same
IBM46 citations96
US6034397AMar 7, 2000
Silicon-on-insulator body- and dual gate-coupled diode for electrostatic discharge (ESD) applications
IBM56 citations96
US5882967AMar 16, 1999
Process for buried diode formation in CMOS
IBM49 citations96
US5789964AAug 4, 1998
Decoupling capacitor network for off-state operation
IBM79 citations96
US7129545B2Oct 31, 2006
Charge modulation network for multiple power domains for silicon-on-insulator technology
IBM46 citations95
US6429482B1Aug 6, 2002
Halo-free non-rectifying contact on chip with halo source/drain diffusion
IBM46 citations95
US6198136B1Mar 6, 2001
Support chips for buffer circuits
IBM60 citations95
US6157530ADec 5, 2000
Method and apparatus for providing ESD protection
IBM48 citations95
US5587857ADec 24, 1996
Silicon chip with an integrated magnetoresistive head mounted on a slider
IBM64 citations95
US7535105B2May 19, 2009
Inter-chip ESD protection structure for high speed and high frequency devices
IBM51 citations94
US6396107B1May 28, 2002
Trench-defined silicon germanium ESD diode network
IBM63 citations94
US5521115AMay 28, 1996
Method of making double grid substrate plate DRAM cell array
IBM49 citations94
US8035190B2Oct 11, 2011
Semiconductor devices
IBM15 citations93
US7949983B2May 24, 2011
High tolerance TCR balanced high current resistor for RF CMOS and RF SiGe BiCMOS applications and cadenced based hierarchical parameterized cell design kit with tunable TCR and ESD resistor ballasting feature
IBM14 citations93
US7750408B2Jul 6, 2010
Integrated circuit structure incorporating an inductor, a conductive sheet and a protection circuit
IBM19 citations93
US7401311B2Jul 15, 2008
Methodology for placement based on circuit function and latchup sensitivity
IBM16 citations93
US7384854B2Jun 10, 2008
Method of forming low capacitance ESD robust diodes
IBM21 citations93
US7242071B1Jul 10, 2007
Semiconductor structure
IBM30 citations93
US7173310B2Feb 6, 2007
Lateral lubistor structure and method
IBM49 citations93
US7089520B2Aug 8, 2006
Methodology for placement based on circuit function and latchup sensitivity
IBM16 citations93
US7064416B2Jun 20, 2006
Semiconductor device and method having multiple subcollectors formed on a common wafer
IBM16 citations93
US6956266B1Oct 18, 2005
Structure and method for latchup suppression utilizing trench and masked sub-collector implantation
IBM62 citations93
US6946707B2Sep 20, 2005
Electrostatic discharge input and power clamp circuit for high cutoff frequency technology radio frequency (RF) applications
IBM25 citations93
US6878976B2Apr 12, 2005
Carbon-modulated breakdown voltage SiGe transistor for low voltage trigger ESD applications
IBM25 citations93
US6746947B2Jun 8, 2004
Post-fuse blow corrosion prevention structure for copper fuses
IBM20 citations93
US6704179B2Mar 9, 2004
Automated hierarchical parameterized ESD network design and checking system
IBM27 citations93
US6586818B1Jul 1, 2003
Self-aligned silicon germanium heterojunction bipolar transistor device with electrostatic discharge crevice cover for salicide displacement
IBM24 citations93
US6574078B1Jun 3, 2003
Method and apparatus for providing electrostatic discharge protection of a magnetic head using a mechanical switch and an electrostatic discharge device network
IBM43 citations93
US6563176B2May 13, 2003
Asymmetrical semiconductor device for ESD protection
IBM22 citations93
US6548338B2Apr 15, 2003
Integrated high-performance decoupling capacitor and heat sink
IBM39 citations93
US6531741B1Mar 11, 2003
Dual buried oxide film SOI structure and method of manufacturing the same
IBM34 citations93
US6512296B1Jan 28, 2003
Semiconductor structure having heterogenous silicide regions having titanium and molybdenum
IBM16 citations93
US6429066B1Aug 6, 2002
Method for producing a polysilicon circuit element
IBM18 citations93
Showing the top 50 of 204 patents by PatentIndex Score.