Inventor

KLIM PETER JUERGEN

US55 patents

⚠️ This page may combine multiple inventors who share the name “KLIM PETER JUERGEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KLIM PETER JUERGEN

IBM

Self power audit and control circuitry for microprocessor functional units

Content addressable storage apparatus and register mapper architecture

Batteryless, oscillatorless, binary time cell usable as an horological device with associated programming methods and devices

Power down system and method for pipelined logic functions

Self-timed CMOS static logic circuit

Elastic self-timed interface for data flow elements embodied as selective bypass of stages in an asynchronous microprocessor pipeline

Decoupling capacitor fuse system

System and method for reducing power consumption in high frequency clocked circuits

Dynamic control of power consumption in self-timed circuits

Register file apparatus and method for computing flush masks in a multi-threaded processing system

Apparatus and method for a radiation resistant latch

Register file with delayed parity check

Power consumption control mechanism and method therefor

Method and system for testing self-timed circuitry

High speed pipeline method and apparatus

Coupling noise reduction technique using reset timing

Logical steering to avoid hot spots on integrated circuits

Leakage sensing and keeper circuit for proper operation of a dynamic circuit

Sensing methods and devices for a batteryless, oscillatorless, analog time cell usable as an horological device

Apparatus and method for a radiation resistant latch with integrated scan

System and method for diagnosing and repairing errors in complementary logic

Self-timed control circuit for self-resetting logic circuitry

Master-slave flip-flop circuit with embedded hold function and method for holding data in a master-slave flip-flop circuit

Reducing sub-threshold leakage in a memory array

Register-file bit-read method and apparatus

Batteryless, osciliatorless, analog time cell usable as an horological device with associated programming methods and devices

Sensing methods and devices for a batteryless, oscillatorless, binary time cell usable as an horological device

Noise suppression circuit for suppressing above-ground noises

Noise suppression circuits for suppressing noises above and below reference voltages

Apparatus and method for timing self-timed circuitry

Self-timed multiplier array

Multistage, single-rail logic circuitry and method therefore

Physical design technique providing single and multiple core microprocessor chips in a single design cycle and manufacturing lot using shared mask sets

Method and system for detecting errors within complementary logic circuits

Method and apparatus for reducing noise induced among conductive lines

Method and system for testing self-timed circuitry

Self-timed address decoder for register file and compare circuit of multi-port cam

Self-timed address decoder for register file and compare circuit of a multi-port CAM

Reduced area active above-supply and below-ground noise suppression circuits

Transient noise detection scheme and apparatus

Processor including a register file and method for computing flush masks in a multi-threaded processing system

Methods and systems for performing horological functions using time cells

Register file apparatus and method incorporating read-after-write blocking using detection cells

Multilevel register-file bit-read method and apparatus

Compound domino logic circuit having output noise elimination

Elimination of SOI parasitic bipolar effect

Register file timing using static timing tools

Data processing system, method, and product for automatically performing timing checks on a memory cell using a static timing tool

Method and system for determining which memory locations have been accessed in a self timed cache architecture

INTERNAT BUSINESSS MACHINES CO

Complementary logic error detection and correction