Inventor
LU CHIH-YUAN
TW72 patents
⚠️ This page may combine multiple inventors who share the name “LU CHIH-YUAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
VANGUARD INT SEMICONDUCT CORP
21 patentsUS6171923B1Jan 9, 2001
Method for fabricating a DRAM cell structure on an SOI wafer incorporating a two dimensional trench capacitor
VANGUARD INT SEMICONDUCT CORP219 citations99
US6057573AMay 2, 2000
Design for high density memory with relaxed metal pitch
VANGUARD INT SEMICONDUCT CORP209 citations99
US5943581AAug 24, 1999
Method of fabricating a buried reservoir capacitor structure for high-density dynamic random access memory (DRAM) circuits
VANGUARD INT SEMICONDUCT CORP322 citations99
US5843820ADec 1, 1998
Method of fabricating a new dynamic random access memory (DRAM) cell having a buried horizontal trench capacitor
VANGUARD INT SEMICONDUCT CORP99 citations98
US6479341B1Nov 12, 2002
Capacitor over metal DRAM structure
VANGUARD INT SEMICONDUCT CORP69 citations96
US6218693B1Apr 17, 2001
Dynamic random access memory (DRAM) cell having a buried horizontal trench capacitor by a novel fabrication method
VANGUARD INT SEMICONDUCT CORP46 citations96
US5933725AAug 3, 1999
Word line resistance reduction method and design for high density memory with relaxed metal pitch
VANGUARD INT SEMICONDUCT CORP49 citations96
US5827394AOct 27, 1998
Step and repeat exposure method for loosening integrated circuit dice from a radiation sensitive adhesive tape backing
VANGUARD INT SEMICONDUCT CORP91 citations96
US5789316AAug 4, 1998
Self-aligned method for forming a narrow via
VANGUARD INT SEMICONDUCT CORP55 citations96
US5595928AJan 21, 1997
High density dynamic random access memory cell structure having a polysilicon pillar capacitor
VANGUARD INT SEMICONDUCT CORP64 citations96
US6180453B1Jan 30, 2001
Method to fabricate a DRAM cell with an area equal to five times the minimum used feature, squared
VANGUARD INT SEMICONDUCT CORP53 citations93
US5976945ANov 2, 1999
Method for fabricating a DRAM cell structure on an SOI wafer incorporating a two dimensional trench capacitor
VANGUARD INT SEMICONDUCT CORP39 citations93
US5821142AOct 13, 1998
Method for forming a capacitor with a multiple pillar structure
VANGUARD INT SEMICONDUCT CORP35 citations93
US5759894AJun 2, 1998
Method for forming a DRAM capacitor using HSG-Si
VANGUARD INT SEMICONDUCT CORP25 citations93
US5663093ASep 2, 1997
Method for forming a cylindrical capacitor having a central spine
VANGUARD INT SEMICONDUCT CORP22 citations93
US5652165AJul 29, 1997
Method of forming a stacked capacitor with a double wall crown shape
VANGUARD INT SEMICONDUCT CORP49 citations93
US5534460AJul 9, 1996
Optimized contact plug process
VANGUARD INT SEMICONDUCT CORP31 citations93
US5792680AAug 11, 1998
Method of forming a low cost DRAM cell with self aligned twin tub CMOS devices and a pillar shaped capacitor
VANGUARD INT SEMICONDUCT CORP44 citations92
US5679596AOct 21, 1997
Spot deposited polysilicon for the fabrication of high capacitance, DRAM devices
VANGUARD INT SEMICONDUCT CORP20 citations84
US6262449B1Jul 17, 2001
High density dynamic random access memory cell structure having a polysilicon pillar capacitor
VANGUARD INT SEMICONDUCT CORP8 citations74
US5930661AJul 27, 1999
Substrate clamp design for minimizing substrate to clamp sticking during thermal processing of thermally flowable layers
VANGUARD INT SEMICONDUCT CORP15 citations74
IND TECH RES INST
15 patentsUS5396093AMar 7, 1995
Vertical DRAM cross point memory cell and fabrication method
IND TECH RES INST148 citations99
US5110752AMay 5, 1992
Roughened polysilicon surface capacitor electrode plate for high denity dram
IND TECH RES INST208 citations99
US5429978AJul 4, 1995
Method of forming a high density self-aligned stack in trench
IND TECH RES INST47 citations96
US5362665ANov 8, 1994
Method of making vertical DRAM cross point memory cell
IND TECH RES INST60 citations96
US5332467AJul 26, 1994
Chemical/mechanical polishing for ULSI planarization
IND TECH RES INST61 citations95
US5552620ASep 3, 1996
Vertical transistor with high density DRAM cell and method of making
IND TECH RES INST25 citations93
US5519238AMay 21, 1996
Rippled polysilicon surface capacitor electrode plate for high density dram
IND TECH RES INST38 citations93
US5451537ASep 19, 1995
Method of forming a DRAM stack capacitor with ladder storage node
IND TECH RES INST27 citations93
US5280190AJan 18, 1994
Self aligned emitter/runner integrated circuit
IND TECH RES INST21 citations93
US5213992AMay 25, 1993
Rippled polysilicon surface capacitor electrode plate for high density DRAM
IND TECH RES INST35 citations93
US5196367AMar 23, 1993
Modified field isolation process with no channel-stop implant encroachment
IND TECH RES INST47 citations93
US5086017AFeb 4, 1992
Self aligned silicide process for gate/runner without extra masking
IND TECH RES INST43 citations93
US5395784AMar 7, 1995
Method of manufacturing low leakage and long retention time DRAM
IND TECH RES INST40 citations92
US5350336ASep 27, 1994
Building and method for manufacture of integrated semiconductor circuit devices
IND TECH RES INST49 citations88
US5594682AJan 14, 1997
High density self-aligned stack in trench DRAM technology
IND TECH RES INST43 citations87
MACRONIX INT CO LTD
6 patentsUS6850432B2Feb 1, 2005
Laser programmable electrically readable phase-change memory method and device
MACRONIX INT CO LTD277 citations99
US7236394B2Jun 26, 2007
Transistor-free random access memory
MACRONIX INT CO LTD61 citations98
US7158411B2Jan 2, 2007
Integrated code and data flash memory
MACRONIX INT CO LTD116 citations98
US7180767B2Feb 20, 2007
Multi-level memory device and methods for programming and reading the same
MACRONIX INT CO LTD20 citations93
US7180123B2Feb 20, 2007
Method for programming programmable eraseless memory
MACRONIX INT CO LTD19 citations92
US7132350B2Nov 7, 2006
Method for manufacturing a programmable eraseless memory
MACRONIX INT CO LTD13 citations84
AT & T BELL LAB
4 patentsUS4952524AAug 28, 1990
Semiconductor device manufacture including trench formation
AT & T BELL LAB345 citations99
US5153145AOct 6, 1992
Fet with gate spacer
AT & T BELL LAB61 citations96
US4933297AJun 12, 1990
Method for etching windows having different depths
AT & T BELL LAB24 citations93
US5036378AJul 30, 1991
Memory device
AT & T BELL LAB28 citations92
AMERICAN TELEPHONE & TELEGRAPH
3 patentsUS4922311AMay 1, 1990
Folded extended window field effect transistor
AMERICAN TELEPHONE & TELEGRAPH38 citations92
US4886765ADec 12, 1989
Method of making silicides by heating in oxygen to remove contamination
AMERICAN TELEPHONE & TELEGRAPH41 citations92
US4844776AJul 4, 1989
Method for making folded extended window field effect transistor
AMERICAN TELEPHONE & TELEGRAPH35 citations92
LUCENT TECHNOLOGIES INC
1 patentShowing the top 50 of 72 patents by PatentIndex Score.