Inventor

DIXIT GIRISH A

US47 patents

⚠️ This page may combine multiple inventors who share the name “DIXIT GIRISH A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

DIXIT GIRISH A

SGS THOMSON MICROELECTRONICS

Method for forming a metal contact

Method of forming vias

Integrated circuit device structure with dielectric and metal stacked plug in contact hole

Interconnect and resistor for integrated circuits

Method for planarized isolation for cmos devices

Method for self-aligned polysilicon contact formation

Field progammable device with contact openings

Method of forming submicron contacts

Planar contact with a void

Method of forming a planar contact with a void

Transistor spacer etch pinpoint structure

Method of forming vias for multilevel metallization

Semiconductor contact via structure and method

Planarized isolation structure for CMOS devices

Method to improve step coverage by contact reflow

Semiconductor contact via structure having amorphous silicon side walls

Interconnect and resistor for integrated circuits

Interconnect for integrated circuits

Self-aligned contact formation

APPLIED MATERIALS INC

Post treatment of low k dielectric films

Post rinse to improve selective deposition of electroless cobalt on copper for ULSI application

Dielectric materials to prevent photoresist poisoning

Bi-layer etch stop for inter-level via

Selective metal encapsulation schemes

Electropolishing of metallic interconnects

Electroless deposition method over sub-micron apertures

Method and apparatus for reducing organic depletion during non-processing time periods

Method and apparatus for reducing charge density on a dielectric coated substrate after exposure to a large area electron beam

Method for removing electrolyte from electrical contacts and wafer touching areas

TEXAS INSTRUMENTS INC

Variable doping of metal plugs for enhanced reliability

Integrated circuit interconnect and method

Low pressure, low temperature, semiconductor gap filling process

Low pressure, low temperature, semiconductor gap filling process

Air-bridge integration scheme for reducing interconnect delay

Elemental titanium-free liner and fabrication process for inter-metal connections

Hydrogen passivation of chemical-mechanically polished copper-containing layers

Self-planarizing low-temperature doped-silicate-glass process capable of gap-filling narrow spaces

Multilayer metal structure for improved interconnect reliability

Integrated circuit insulator and method

NOVELLUS SYSTEMS INC

Apparatus and methods for deposition and/or etch selectivity

Soft landing nanolaminates for advanced patterning

Soft landing nanolaminates for advanced patterning

ST MICROELECTRONICS INC

Method for forming a metal contact

Method for forming a metal contact

Structure and method of forming vias

KLAWUHN ERICH R

Apparatus and methods for deposition and/or etch selectivity

LAM RES CORP

Bubble defect reduction