Inventor

HANNON ROBERT

US48 patents

⚠️ This page may combine multiple inventors who share the name “HANNON ROBERT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HANNON ROBERT

IBM

Planar mixed SOI-bulk substrate for microelectronic applications

Using crack arrestor for inhibiting damage from dicing and chip packaging interaction failures in back end of line structures

Low programming voltage anti-fuse

Self-aligned deep trench isolation to shallow trench isolation

Deep trench body SOI contacts with epitaxial layer formation

Front side wafer ID processing

Underbump metallurgy for enhanced electromigration resistance

Method and structure to reduce cracking in flip chip underfill

Method and structure for eliminating aluminum terminal pad material in semiconductor devices

Optimized annular copper TSV

Laser ablation apparatus and method

Aluminum nitride body having graded metallurgy

Aluminum nitride body having graded metallurgy

Method for the controlling of certain second phases in aluminum nitride

Aluminum nitride body having graded metallurgy

Aluminum nitride body having graded metallurgy

Method for flat firing aluminum nitride/tungsten electronic modules

Mounting and/or removing of components using optical fiber tools

Metal-contamination-free through-substrate via structure

Method of inhibition of metal diffusion arising from laser dicing

Method of forming dislocation filter in merged SOI and non-SOI chips

Method for controlling of certain second phases in aluminum nitride

High thermal conductivity substrate and the method of brazing a cap thereto

Implant after through-silicon via (TSV) etch to getter mobile ions

Structures and methods of forming pre fabricated deep trench capacitors for SOI substrates

Semiconductor device including dislocation in merged SOI/DRAM chips

Inhibition of metal diffusion arising from laser dicing

Method for the controlling of certain second phases in aluminum nitride

FAROOQ MUKTA G

3D integrated circuit device fabrication with precisely controllable substrate removal

Metal-contamination-free through-substrate via structure

Three dimensional integrated circuit integration using dielectric bonding first and through via formation last

Alignment marks to enable 3D integration

3D integrated circuit device having lower-cost active circuitry layers stacked before higher-cost active circuitry layer

3D integrated circuit device fabrication using interface wafer as permanent carrier

Method for fabricating 3D integrated circuit device using interface wafer as permanent carrier

3D integrated circuit device fabrication with precisely controllable substrate removal

Method for fabricating a 3D integrated circuit device having lower-cost active circuitry layers stacked before higher-cost active circuitry layer

Computer readable medium encoded with a program for fabricating 3D integrated circuit device using interface wafer as permanent carrier

3D integrated circuit device fabrication with precisely controllable substrate removal

3D multiple die stacking

BOSTON SCIENT SCIMED INC

Method of making a vascular occlusion device

Elevator components for medical devices

Medical devices and related methods

Cryotherapeutic delivery device

LANE MICHAEL W

Structure for inhibiting back end of line damage from dicing and chip packaging interaction failures

BOOTH JR ROGER A

Method and structure for forming a deep trench capacitor

ANDRY PAUL S

Optimized annular copper TSV

(unassigned)

Portable soccer golf game