Inventor

MATSUZAKI YASUROU

JP70 patents

⚠️ This page may combine multiple inventors who share the name “MATSUZAKI YASUROU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MATSUZAKI YASUROU

FUJITSU LTD

Semiconductor memory

Semiconductor memory device for operating in synchronization with edge of clock signal

Dynamic memory circuit with automatic refresh function

Semiconductor memory device capable of reducing power consumption in self-refresh operation

Semiconductor memory device capable of reducing power consumption in self-refresh operation

Integrated circuit device with built-in self timing control circuit

Semiconductor device with prompt timing stabilization

Semiconductor device and semiconductor system for high-speed data transfer

Self-test circuit and memory device incorporating it

Semiconductor integrated circuit device

Multi-port memory based on DRAM core

Memory circuit with automatic precharge function, and integrated circuit device with automatic internal command function

Semiconductor memory device having improved data transfer rate without providing a register for holding write data

Semiconductor memory device having a refresh operation

DLL circuit adjustable with external load

Semiconductor device, semiconductor system, and digital delay circuit

Integrated circuit device

Semiconductor integrated circuit memory

Semiconductor device using complementary clock and signal input state detection circuit used for the same

Semiconductor wafer testing method with probe pin contact

System configured of synchronous semiconductor device for adjusting timing of each input and semiconductor device used therefor

Semiconductor apparatus having a large-size bus connection

Semiconductor device and multichip module

Semiconductor device

Input circuit and semiconductor integrated circuit having the input circuit

Self-timing control circuit

LSI device with memory and logics mounted thereon

DLL circuit

Semiconductor memory device having a dummy cell resetting the bit lines to a reset potential that is based on data read in a previous read data

Internal voltage generating circuit

DLL circuit and a memory device building the same in

Input/output data synchronizing device

Semiconductor device having timing-stabilization circuit and method of testing such semiconductor device

Semiconductor storage device using redundancy method

Semiconductor phase adjustment system module

Semiconductor memory

Semiconductor memory with single cell and twin cell refreshing

Semiconductor device using complementary clock and signal input state detection circuit used for the same

System configured of synchronous semiconductor device for adjusting timing of each input and semiconductor device used therefor

Test apparatus for semiconductor device

Semiconductor apparatus having a large-size bus connection

Memory circuit with automatic precharge function, and integrated circuit device with automatic internal command function

Semiconductor apparatus having a large-size bus connection

Semiconductor memory

Input circuit and semiconductor integrated circuit having the input circuit

Input/output interface and semiconductor integrated circuit having input/output interface

Memory circuit with automatic precharge function, and integrated circuit device with automatic internal command function

Semiconductor device, method of testing the semiconductor device, and semiconductor integrated circuit

FUJITSU SEMICONDUCTOR LTD

Semiconductor device with circuitry for efficient information exchange

Multi-port memory based on DRAM core