Inventor
RYAN VIVIAN
US20 patents
⚠️ This page may combine multiple inventors who share the name “RYAN VIVIAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
AGERE SYSTEMS INC
14 patentsUS6747445B2Jun 8, 2004
Stress migration test structure and method therefor
AGERE SYSTEMS INC51 citations92
US6683465B2Jan 27, 2004
Integrated circuit having stress migration test structure and method therefor
AGERE SYSTEMS INC21 citations92
US7429502B2Sep 30, 2008
Integrated circuit device incorporating metallurgical bond to enhance thermal conduction to a heat sink
AGERE SYSTEMS INC23 citations91
US7504728B2Mar 17, 2009
Integrated circuit having bond pad with improved thermal and mechanical properties
AGERE SYSTEMS INC7 citations73
US7800879B2Sep 21, 2010
On-chip sensor array for temperature management in integrated circuits
AGERE SYSTEMS INC6 citations62
US7157365B2Jan 2, 2007
Semiconductor device having a dummy conductive via and a method of manufacture therefor
AGERE SYSTEMS INC4 citations62
US7327029B2Feb 5, 2008
Integrated circuit device incorporating metallurigical bond to enhance thermal conduction to a heat sink
AGERE SYSTEMS INC3 citations61
US7745927B2Jun 29, 2010
Heat sink formed of multiple metal layers on backside of integrated circuit die
AGERE SYSTEMS INC5 citations59
US7573097B2Aug 11, 2009
Lateral double diffused MOS transistors
AGERE SYSTEMS INC3 citations59
US7339274B2Mar 4, 2008
Metallization performance in electronic devices
AGERE SYSTEMS INC4 citations58
US7973544B2Jul 5, 2011
Thermal monitoring and management of integrated circuits
AGERE SYSTEMS INC0 citations50
US7705473B2Apr 27, 2010
Methods and apparatus for determining pad height for a wire-bonding operation in an integrated circuit
AGERE SYSTEMS INC0 citations47
US7056819B2Jun 6, 2006
Methods and apparatus for determining pad height for a wire-bonding operation in an integrated circuit
AGERE SYSTEMS INC0 citations47
US6919228B2Jul 19, 2005
Methods and apparatus for the detection of damaged regions on dielectric film or other portions of a die
AGERE SYSTEMS INC0 citations47
LUCENT TECHNOLOGIES INC
4 patentsUS5986343ANov 16, 1999
Bond pad design for integrated circuits
LUCENT TECHNOLOGIES INC126 citations99
US6207547B1Mar 27, 2001
Bond pad design for integrated circuits
LUCENT TECHNOLOGIES INC48 citations96
US6187658B1Feb 13, 2001
Bond pad for a flip chip package, and method of forming the same
LUCENT TECHNOLOGIES INC22 citations92
US6087732AJul 11, 2000
Bond pad for a flip-chip package
LUCENT TECHNOLOGIES INC27 citations92