Inventor
NAGARAKANTI KAILASHNATH
US3 patents
Patents
3 patentsUS7111186B2Sep 19, 2006
Method and apparatus for static phase offset correction
SUN MICROSYSTEMS INC10 citations71
US7242255B1Jul 10, 2007
Method and apparatus for minimizing phase error and jitter in a phase-locked loop
SUN MICROSYSTEMS INC5 citations59
US7372341B2May 13, 2008
Noise immunity circuitry for phase locked loops and delay locked loops
SUN MICROSYSTEMS INC5 citations54