Inventor
KUKAL TARANJIT SINGH
IN31 patents
⚠️ This page may combine multiple inventors who share the name “KUKAL TARANJIT SINGH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
CADENCE DESIGN SYSTEMS INC
24 patentsUS9223915B1Dec 29, 2015
Method, system, and computer program product for checking, verifying, or testing a multi-fabric electronic design spanning across multiple design fabrics
CADENCE DESIGN SYSTEMS INC39 citations98
US9361415B1Jun 7, 2016
Method, system, and computer program product for implementing a multi-fabric electronic design spanning across multiple design fabrics
CADENCE DESIGN SYSTEMS INC10 citations92
US9348960B1May 24, 2016
Method, system, and computer program product for probing or netlisting a multi-fabric electronic design spanning across multiple design fabrics
CADENCE DESIGN SYSTEMS INC10 citations92
US9280621B1Mar 8, 2016
Methods, systems, and articles of manufacture for analyzing a multi-fabric electronic design and displaying analysis results for the multi-fabric electronic design spanning and displaying simulation results across multiple design fabrics
CADENCE DESIGN SYSTEMS INC12 citations92
US7490309B1Feb 10, 2009
Method and system for automatically optimizing physical implementation of an electronic circuit responsive to simulation analysis
CADENCE DESIGN SYSTEMS INC31 citations92
US10558780B1Feb 11, 2020
Methods, systems, and computer program product for implementing schematic driven extracted views for an electronic design
CADENCE DESIGN SYSTEMS INC20 citations90
US9449130B1Sep 20, 2016
Methods, systems, and articles of manufacture for back annotating and visualizing parasitic models of electronic designs
CADENCE DESIGN SYSTEMS INC10 citations90
US9286421B1Mar 15, 2016
Methods, systems, and articles of manufacture for back annotating and visualizing parasitic models of electronic designs
CADENCE DESIGN SYSTEMS INC16 citations90
US9881119B1Jan 30, 2018
Methods, systems, and computer program product for constructing a simulation schematic of an electronic design across multiple design fabrics
CADENCE DESIGN SYSTEMS INC19 citations85
US9881120B1Jan 30, 2018
Method, system, and computer program product for implementing a multi-fabric mixed-signal design spanning across multiple design fabrics with electrical and thermal analysis awareness
CADENCE DESIGN SYSTEMS INC18 citations84
US10997332B1May 4, 2021
System and method for computing electrical over-stress of devices associated with an electronic design
CADENCE DESIGN SYSTEMS INC10 citations83
US10467370B1Nov 5, 2019
Methods, systems, and computer program product for implementing a net as a transmission line model in a schematic driven extracted view for an electronic design
CADENCE DESIGN SYSTEMS INC7 citations81
US10289793B1May 14, 2019
System and method to generate schematics from layout-fabrics with a common cross-fabric model
CADENCE DESIGN SYSTEMS INC16 citations81
US9934354B1Apr 3, 2018
Methods, systems, and computer program product for implementing a layout-driven, multi-fabric schematic design
CADENCE DESIGN SYSTEMS INC15 citations81
US9454634B1Sep 27, 2016
Methods, systems, and computer program product for an integrated circuit package design estimator
CADENCE DESIGN SYSTEMS INC10 citations81
US9798848B1Oct 24, 2017
Method, system, and computer program product for performing channel analyses for an electronic circuit design including a parallel interface
CADENCE DESIGN SYSTEMS INC7 citations80
US9928318B1Mar 27, 2018
System and method for simulating channels
CADENCE DESIGN SYSTEMS INC8 citations79
US10528688B1Jan 7, 2020
System and method for schematic-driven generation of input/output models
CADENCE DESIGN SYSTEMS INC9 citations77
US10643020B1May 5, 2020
System and method to estimate a number of layers needed for routing a multi-die package
CADENCE DESIGN SYSTEMS INC8 citations75
US10783307B1Sep 22, 2020
System and method for power-grid aware simulation of an IC-package schematic
CADENCE DESIGN SYSTEMS INC2 citations73
US10678978B1Jun 9, 2020
Methods, systems, and computer program product for binding and back annotating an electronic design with a schematic driven extracted view
CADENCE DESIGN SYSTEMS INC5 citations72
US10726188B1Jul 28, 2020
Method, system, and computer program product for performing channel analyses for an electronic circuit design including a parallel interface
CADENCE DESIGN SYSTEMS INC4 citations69
US9785141B2Oct 10, 2017
Method, system, and computer program product for schematic driven, unified thermal and electromagnetic interference compliance analyses for electronic circuit designs
CADENCE DESIGN SYSTEMS INC6 citations68
US11354477B1Jun 7, 2022
System and method for performance estimation for electronic designs using subcircuit matching and data-reuse
CADENCE DESIGN SYSTEMS INC2 citations67
KUKAL TARANJIT SINGH
6 patentsUS8656329B1Feb 18, 2014
System and method for implementing power integrity topology adapted for parametrically integrated environment
KUKAL TARANJIT SINGH29 citations90
US8286110B1Oct 9, 2012
System and method for adapting electrical integrity analysis to parametrically integrated environment
KUKAL TARANJIT SINGH26 citations90
US8898039B1Nov 25, 2014
Physical topology-driven logical design flow
KUKAL TARANJIT SINGH16 citations81
US8732651B1May 20, 2014
Logical design flow with structural compatability verification
KUKAL TARANJIT SINGH13 citations81
US8645894B1Feb 4, 2014
Configuration and analysis of design variants of multi-domain circuits
KUKAL TARANJIT SINGH16 citations80
US8145458B1Mar 27, 2012
Method and system for automatic stress analysis of analog components in digital electronic circuit
KUKAL TARANJIT SINGH18 citations77