Inventor
CHENG HONG-CHEN
TW49 patents
⚠️ This page may combine multiple inventors who share the name “CHENG HONG-CHEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
TAIWAN SEMICONDUCTOR MFG CO LTD
20 patentsUS9679619B2Jun 13, 2017
Sense amplifier with current regulating circuit
TAIWAN SEMICONDUCTOR MFG CO LTD7 citations82
US11854943B2Dec 26, 2023
Memory macro including through-silicon via
TAIWAN SEMICONDUCTOR MFG CO LTD2 citations73
US11562946B2Jan 24, 2023
Memory macro including through-silicon via
TAIWAN SEMICONDUCTOR MFG CO LTD3 citations73
US9852249B2Dec 26, 2017
Modified design rules to improve device performance
TAIWAN SEMICONDUCTOR MFG CO LTD2 citations71
US10267853B2Apr 23, 2019
System and method to diagnose integrated circuit
TAIWAN SEMICONDUCTOR MFG CO LTD2 citations70
US12308303B2May 20, 2025
Integrated circuit die with memory macro including through-silicon via and method of forming the same
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations63
US11723195B2Aug 8, 2023
Semiconductor device having an inter-layer via (ILV), and method of making same
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations63
US11024634B2Jun 1, 2021
Semiconductor device having an inter-layer via (ILV), and method of making same
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations63
US11138359B2Oct 5, 2021
Method of fabricating a semiconductor device
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations60
US8970256B2Mar 3, 2015
Sense amplifier
TAIWAN SEMICONDUCTOR MFG CO LTD2 citations58
US10170487B2Jan 1, 2019
Device having an inter-layer via (ILV), and method of making same
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US10049706B2Aug 14, 2018
Memory and method of operating the same
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US9685226B2Jun 20, 2017
Tracking signals in memory write or read operation
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US9589885B2Mar 7, 2017
Device having multiple-layer pins in memory MUX1 layout
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US9484350B2Nov 1, 2016
Semiconductor device having an inter-layer via (ILV), and method of making same
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US9007851B2Apr 14, 2015
Memory read techniques using Miller capacitance decoupling circuit
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52
US10001801B2Jun 19, 2018
Voltage providing circuit
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations51
US10762269B2Sep 1, 2020
Method of fabricating a semiconductor device
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations50
US10339248B2Jul 2, 2019
Modified design rules to improve device performance
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations50
US10866281B2Dec 15, 2020
System and method to diagnose integrated circuit
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations49
TAIWAN SEMICONDUCTOR MFG
9 patentsUS8355277B2Jan 15, 2013
Biasing circuit and technique for SRAM data retention
TAIWAN SEMICONDUCTOR MFG6 citations73
US9104214B2Aug 11, 2015
Voltage providing circuit
TAIWAN SEMICONDUCTOR MFG3 citations62
US7848174B2Dec 7, 2010
Memory word-line tracking scheme
TAIWAN SEMICONDUCTOR MFG5 citations59
US9324453B2Apr 26, 2016
Memory unit and method of testing the same
TAIWAN SEMICONDUCTOR MFG0 citations52
US9129956B2Sep 8, 2015
Device having multiple-layer pins in memory MUX1 layout
TAIWAN SEMICONDUCTOR MFG0 citations52
US8665654B2Mar 4, 2014
Memory edge cell
TAIWAN SEMICONDUCTOR MFG1 citations52
US9275181B2Mar 1, 2016
Cell design
TAIWAN SEMICONDUCTOR MFG1 citations51
US7639551B2Dec 29, 2009
Sense amplifiers operated under hamming distance methodology
TAIWAN SEMICONDUCTOR MFG0 citations51
US9287276B2Mar 15, 2016
Memory cell array
TAIWAN SEMICONDUCTOR MFG0 citations50
CHENG HONG-CHEN
6 patentsUS8675439B2Mar 18, 2014
Bit line voltage bias for low power memory design
CHENG HONG-CHEN8 citations81
US9142274B2Sep 22, 2015
Tracking for write operations of memory devices
CHENG HONG-CHEN6 citations72
US9058858B2Jun 16, 2015
Method and apparatus for dual rail SRAM level shifter with latching
CHENG HONG-CHEN4 citations72
US8482990B2Jul 9, 2013
Memory edge cell
CHENG HONG-CHEN2 citations62
US8582379B2Nov 12, 2013
Single ended sensing scheme for memory
CHENG HONG-CHEN2 citations61
US8792292B2Jul 29, 2014
Providing row redundancy to solve vertical twin bit failures
CHENG HONG-CHEN0 citations41
CHEN HSU-SHUN
4 patentsUS8279684B2Oct 2, 2012
Method for extending word-line pulses
CHEN HSU-SHUN3 citations62
US8451669B2May 28, 2013
Multi-power domain design
CHEN HSU-SHUN3 citations61
US9099168B2Aug 4, 2015
Method for extending word-line pulses
CHEN HSU-SHUN0 citations51
US8174911B2May 8, 2012
Multi-power domain design
CHEN HSU-SHUN0 citations51