Inventor

CZORNOMAZ LUKAS

CH56 patents

⚠️ This page may combine multiple inventors who share the name “CZORNOMAZ LUKAS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CZORNOMAZ LUKAS

IBM

Radiation detector

Resistive memory device

Method to form dual channel group III-V and Si/Ge FINFET CMOS

Controlled confined lateral III-V epitaxy

Electro-optical device with lateral current injection regions

Semiconductor structure and method for manufacturing a semiconductor structure

Semiconductor device and method for fabricating the same

Qubit biasing scheme using non-volatile devices

Fabrication of semiconductor fin structures

System on chip material co-integration

Method to form dual channel group III-V and Si/Ge FINFET CMOS and integrated circuit fabricated using the method

Controlled confined lateral III-V epitaxy

Electro-optical device with lateral current injection regions

Fabricating raised source drain contacts of a CMOS structure

Fabricating contacts of a CMOS structure

Fabricating a dual gate stack of a CMOS structure

Fabricating a dual gate stack of a CMOS structure

Electro-optical device with asymmetric, vertical current injection ohmic contacts

Resistive memory apparatus using variable-resistance channels with high- and low-resistance regions

Fabrication of compound semiconductor structures

Method for fabricating a semiconductor structure

Semiconductor device

Fabrication of semiconductor structures

Fabricating contacts of a CMOS structure

Fabricating raised source drain contacts of a CMOS structure

Lateral current injection electro-optical device with well-separated doped III-V layers structured as photonic crystals

Ultra-thin-body GaN on insulator device

Method for fabricating a semiconductor device for use in an optical application

Capacitorless DRAM cell

Capacitorless dram cell

Method of forming an electro-optical device with lateral current injection regions

Method to form group III-V and Si/Ge FINFET on insulator and integrated circuit fabricated using the method

Method to form group III-V and Si/Ge FINFET on insulator

Lateral current injection electro-optical device with well-separated doped III-V layers structured as photonic crystals

Lateral current injection electro-optical device with well-separated doped III-V layers structured as photonic crystals

Array of optoelectronic structures and fabrication thereof

Fabricating contacts of a CMOS structure

Fabricating raised source drain contacts of a CMOS structure

Design/technology co-optimization platform for high-mobility channels CMOS technology

Array of optoelectronic structures and fabrication thereof

Method for fabricating a semiconductor device for use in an optical application

Fabrication of hybrid semiconductor circuits

Low-noise amplifier with quantized conduction channel

Fabrication of compound semiconductor structures

Fabrication of semiconductor fin structures

Resistive memory apparatus using variable-resistance channels with high- and low-resistance regions

Method for fabricating a crystalline metal-phosphide hetero-layer by converting first and second crystalline metal-source layers into first and second crystalline metal phosphide layers

Field-effect transistor structure and fabrication method

Fabrication of semiconductor structures

NANOMADE CONCEPT

Touch surface and method of manufacturing same