Inventor

HONG CHEONG MIN

US50 patents

⚠️ This page may combine multiple inventors who share the name “HONG CHEONG MIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HONG CHEONG MIN

FREESCALE SEMICONDUCTOR INC

Non-volatile memory (NVM) and high-K and metal gate integration using gate-last methodology

Method of gate strapping in split-gate memory cell with inlaid gate

Method of forming supra low threshold devices

Method to form a polysilicon nanocrystal thin film storage bitcell within a high k metal gate platform technology using a gate last process to form transistor gates

Method of forming different voltage devices with high-K metal gate

Non-volatile memory (NVM) and high-k and metal gate integration using gate-first methodology

Split gate flash cell

Method for integrating non-volatile memory cells with static random access memory cells and logic transistors

Electronic device including trenches and discontinuous storage elements

Process of forming an electronic device including fins and discontinuous storage elements

Method of forming different voltage devices with high-k metal gate

Electronic device including trenches and discontinuous storage elements and processes of forming and using the same

Method of making a non-volatile memory (NVM) with trap-up reduction

Method for forming a split gate device

Nanocrystal memory with differential energy bands and method of formation

Method of forming split gate memory with improved reliability

Non-volatile memory (NVM) cell and device structure integration

Methods for forming contact landing regions in split-gate non-volatile memory (NVM) cell arrays

Non-volatile memory (NVM) cell and a method of making

Split gate device with doped region and method therefor

HONG CHEONG MIN

Split-gate non-volatile memory (NVM) cell and device structure integration

Biasing split gate memory cell during power-off mode

Reram device structure

Non-volatile memory (NVM) and high voltage transistor integration

Methods and structures for a split gate memory cell structure

Split gate programming

ReRAM device structure

Nanocrystal memory with differential energy bands and method of formation

Method of forming split gate memory with improved reliability

Nanocrystal memory and methods for forming same

Semiconductor memory cell and driver circuitry with gate oxide formed simultaneously

ZHOU FENG

Field focusing features in a ReRAM cell

Field focusing features in a ReRAM cell

Field focusing features in a ReRAM cell

Resistive random access memory (RAM) cell and method for forming

PERERA ASANGA H

Non-volatile memory (NVM) cell, high voltage transistor, and high-K and metal gate transistor integration

Integrated split gate non-volatile memory cell and logic structure

Integrated split gate non-volatile memory cell and logic device

NXP BV

Fingered capacitor with low-k and ultra-low-k dielectric layers

Fingered capacitor with low-K and ultra-low-K dielectric layers

Gated diode having fingers with elevated gates

KANG SUNG-TAEG

Methods and structures for split gate memory

Split gate non-volatile memory (NVM) cell and method therefor

YATER JANE A

Methods for forming contact landing regions in split-gate non-volatile memory (NVM) cell arrays

Scalable split gate memory cell array

BAKER JR FRANK K

Non-volatile memory (NVM) cell and high-K and metal gate transistor integration

WINSTEAD BRIAN A

Split gate non-volatile memory cell

NXP USA INC

Methods and structures for a split gate memory cell structure

WILLIAMS JACOB T

Non-volatile memory (NVM) cell

LI CHI-NAN

Electronic device including trenches and discontinuous storage elements