Inventor

WALTON ANDREW C

US27 patents

⚠️ This page may combine multiple inventors who share the name “WALTON ANDREW C”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WALTON ANDREW C

HEWLETT PACKARD ENTPR DEV LP

Error counters on a memory device

Memory error determination

Post package repair (PPR) data in non-volatile memory

DRAM row sparing

Header and payload signals with different optical properties

Memory access rate

Reallocate memory pending queue based on stall

Post package repair (PPR) data in non-volatile memory

Memory erasure information in cache lines

Reallocate memory pending queue based on stall

Simulator based detection of a violation of a coherency protocol in an incoherent shared memory system

Mapping mode shift between mapping modes that provides continuous application access to storage, wherein address range is remapped between said modes during data migration and said address range is also utilized bypass through instructions for direct access

Memory sparing on memory modules

WALTON ANDREW C

Managing errors in a data processing system

Error log consolidation

Handling errors in a data processing system

Resource fault management for partitions

HEWLETT PACKARD DEVELOPMENT CO

Method and apparatus for processing unit synchronization for scalable parallel processing

System and method for implementing a stride value for memory testing

Systems and methods for implementing a stride value for accessing memory

RAJKUMARI ANURUPA

Synchronize error handling for a plurality of partitions

BARLOW JEFFREY A

Field replaceable unit failure determination

THAYER LARRY J

Systems and methods of selectively managing errors in memory modules

HEWLETT-PACKARD ENTPR DEV LP

Regulating memory activation rates

CALKIN HOWARD

Analysis result stored on a field replaceable unit

MURALIMANOHAR NAVEEN

Memory error test routine

PATEL NEHAL K

Method and system of error logging