Inventor

RAORANE DIGVIJAY A

US23 patents

⚠️ This page may combine multiple inventors who share the name “RAORANE DIGVIJAY A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

RAORANE DIGVIJAY A

INTEL CORP

Die sidewall interconnects for 3D chip assemblies

Embedded bridge with through-silicon Vias

Embedded bridge with through-silicon vias

Enclosure for an electronic component

Tamper resistant lock assembly having physical unclonable functions

Multichip integration with through silicon via (TSV) die embedded in package

Method of forming an interference shield on a substrate

Electronic device package

Electronic package assembly with compact die placement

Control of warpage using ABF GC cavity for embedded die package

Landing pad apparatus for through-silicon-vias

Bridge hub tiling architecture

Multichip integration with through silicon via (TSV) die embedded in package

Thin film based electromagnetic interference shielding with BBUL/coreless packages

Embedded bridge die with through-silicon vias

Embedded bridge with through-silicon vias

Control of warpage using ABF GC cavity for embedded die package

Semiconductor package having passive support wafer

Electronic package assembly with stiffener

RAORANE DIGVIJAY A

Multichip integration with through silicon via (TSV) die embedded in package

Method to increase I/O density and reduce layer counts in BBUL packages

TEH WENG HONG

Bumpless build-up layer (BBUL) semiconductor package with ultra-thin dielectric layer

JAWORSKI JUSTYN W

Receptors useful for gas phase chemical sensing