P

Inventor

PARVIZI MAHDI

CA22 patents
⚠️ This page may combine multiple inventors who share the name “PARVIZI MAHDI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CIENA CORP

19 patents
US10715155B1Jul 14, 2020

Apparatus and methods for digital phase locked loop with analog proportional control function

CIENA CORP16 citations94
US10727854B1Jul 28, 2020

Apparatus and methods for realization of N time interleaved digital-to-analog converters

CIENA CORP15 citations84
US10678112B2Jun 9, 2020

Fully differential traveling wave series push-pull mach-zehnder modulator

CIENA CORP7 citations84
US10320374B2Jun 11, 2019

Fine resolution high speed linear delay element

CIENA CORP9 citations84
US10903841B1Jan 26, 2021

Apparatus and methods for high frequency clock generation

CIENA CORP14 citations83
US10749536B1Aug 18, 2020

High-order phase tracking loop with segmented proportional and integral controls

CIENA CORP5 citations83
US10516403B1Dec 24, 2019

High-order phase tracking loop with segmented proportional and integral controls

CIENA CORP10 citations83
US10425099B1Sep 24, 2019

Extremely-fine resolution sub-ranging current mode Digital-Analog-Converter using Sigma-Delta modulators

CIENA CORP17 citations83
US10848164B1Nov 24, 2020

Apparatus and methods for digital fractional phase locked loop with a current mode low pass filter

CIENA CORP10 citations82
US10330962B1Jun 25, 2019

Patterned accumulation mode capacitive phase shifter

CIENA CORP7 citations78
US11012081B2May 18, 2021

Apparatus and methods for digital phase locked loop with analog proportional control function

CIENA CORP2 citations73
US10680585B2Jun 9, 2020

Techniques and circuits for time-interleaved injection locked voltage controlled oscillators with jitter accumulation reset

CIENA CORP6 citations73
US11196534B1Dec 7, 2021

Apparatus and methods for low power clock generation in multi-channel high speed devices

CIENA CORP2 citations72
US11561570B2Jan 24, 2023

Apparatus and methods for low power frequency clock generation and distribution

CIENA CORP0 citations62
US11349486B1May 31, 2022

High-order phase tracking loop with segmented proportional and integral controls

CIENA CORP0 citations62
US11218155B2Jan 4, 2022

Apparatus and methods for digital fractional phase locked loop with a current mode low pass filter

CIENA CORP0 citations61
US11245401B2Feb 8, 2022

Apparatus and methods for high frequency clock generation

CIENA CORP0 citations60
US11804847B2Oct 31, 2023

Fractional frequency synthesis by sigma-delta modulating frequency of a reference clock

CIENA CORP0 citations50
US11770203B2Sep 26, 2023

Matching transmitters with receivers for making network-level assignments

CIENA CORP0 citations50

PARVIZI MAHDI

1 patent

PIKE JACOB

1 patent

AOUINI SADOK

1 patent