Inventor

DELANO ERIC

US24 patents

⚠️ This page may combine multiple inventors who share the name “DELANO ERIC”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

DELANO ERIC

INTEL CORP

Method, system, and apparatus for dynamic reconfiguration of resources

Power gating a portion of a cache memory

Power gating a portion of a cache memory

Virtual shared cache mechanism in a processing device

Processors having virtually clustered cores and cache slices

Processors having virtually clustered cores and cache slices

Processors having virtually clustered cores and cache slices

Processors having virtually clustered cores and cache slices

Band configuration agent for link based computing system

HEWLETT PACKARD DEVELOPMENT CO

Multi-cluster processor for processing instructions of one or more instruction threads

Processor-architecture for facilitating a virtual machine monitor

Core parallel execution with different optimization characteristics to decrease dynamic execution path

Checkpointing of register file

Apparatus and methods for sharing cache among processors

Timeout event trigger generation

Multidispatch CPU integrated circuit having virtualized and modular resources and adjustable dispatch priority

Configurable crossbar and related methods

KUMAR GANESH

Memory mirroring and migration at home agent

Home agent data and memory management

Controllably exiting an unknown state of a cache coherency directory

HEWLETT PACKARD CO

Method and apparatus for checking cache coherency in a computer architecture

Method for decreasing time penalty resulting from a cache miss in a multi-level cache system

AYYAR MANI

Method, system, and apparatus for dynamic reconfiguration of resources

Method, system, and apparatus for dynamic reconfiguration of resources