P

Inventor

WALKER GEORGE FREDERICK

US27 patents
⚠️ This page may combine multiple inventors who share the name “WALKER GEORGE FREDERICK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

25 patents
US7538565B1May 26, 2009

High density integrated circuit apparatus, test probe and methods of use thereof

IBM112 citations99
US6334247B1Jan 1, 2002

High density integrated circuit apparatus, test probe and methods of use thereof

IBM277 citations99
US6332270B2Dec 25, 2001

Method of making high density integral test probe

IBM231 citations99
US6300780B1Oct 9, 2001

High density integrated circuit apparatus, test probe and methods of use thereof

IBM197 citations99
US5821763AOct 13, 1998

Test probe for high density integrated circuits, methods of fabrication thereof and methods of use thereof

IBM349 citations99
US5838160ANov 17, 1998

Integral rigid chip test probe

IBM99 citations98
US5682143AOct 28, 1997

Radio frequency identification tag

IBM557 citations98
US6323128B1Nov 27, 2001

Method for forming Co-W-P-Au films

IBM292 citations97
US7276787B2Oct 2, 2007

Silicon chip carrier with conductive through-vias and method for fabricating same

IBM124 citations96
US6104201AAug 15, 2000

Method and apparatus for passive characterization of semiconductor substrates subjected to high energy (MEV) ion implementation using high-injection surface photovoltage

IBM82 citations96
US5958590ASep 28, 1999

Dendritic powder materials for high conductivity paste applications

IBM72 citations96
US5837119ANov 17, 1998

Methods of fabricating dendritic powder materials for high conductivity paste applications

IBM60 citations96
US6351134B2Feb 26, 2002

Semiconductor wafer test and burn-in

IBM127 citations95
US6646345B2Nov 11, 2003

Method for forming Co-W-P-Au films

IBM45 citations94
US5813870ASep 29, 1998

Selectively filled adhesives for semiconductor chip interconnection and encapsulation

IBM55 citations94
US5929651AJul 27, 1999

Semiconductor wafer test and burn-in

IBM80 citations93
US7276919B1Oct 2, 2007

High density integral test probe

IBM35 citations92
US6819000B2Nov 16, 2004

High density area array solder microjoining interconnect structure and fabrication method

IBM28 citations92
US6732908B2May 11, 2004

High density raised stud microjoining system and methods of fabricating the same

IBM19 citations92
US6661098B2Dec 9, 2003

High density area array solder microjoining interconnect structure and fabrication method

IBM18 citations92
US5855993AJan 5, 1999

Electronic devices having metallurgies containing copper-semiconductor compounds

IBM49 citations89
US6414509B1Jul 2, 2002

Method and apparatus for in-situ testing of integrated circuit chips

IBM18 citations79
US6747472B2Jun 8, 2004

Temporary device attach structure for test and burn in of microjoint interconnects and method for fabricating the same

IBM8 citations72
US5660921AAug 26, 1997

Poly (aryl ether benzimidazoles) their use capping layers in microelectronic structures

IBM4 citations69
US7880305B2Feb 1, 2011

Technology for fabrication of packaging interface substrate wafers with fully metallized vias through the substrate wafer

IBM0 citations42

INTERMEC IP CORP

2 patents