Inventor
SUNDARESWARAN SAVITHRI
US7 patents
⚠️ This page may combine multiple inventors who share the name “SUNDARESWARAN SAVITHRI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
SUNDARESWARAN SAVITHRI
4 patentsUS8656331B1Feb 18, 2014
Timing margins for on-chip variations from sensitivity data
SUNDARESWARAN SAVITHRI29 citations88
US9177096B2Nov 3, 2015
Timing closure using transistor sizing in standard cells
SUNDARESWARAN SAVITHRI10 citations79
US8612915B1Dec 17, 2013
Reducing leakage in standard cells
SUNDARESWARAN SAVITHRI5 citations70
US8618838B2Dec 31, 2013
Integrated circuit having a standard cell and method for forming
SUNDARESWARAN SAVITHRI0 citations48
FREESCALE SEMICONDUCTOR INC
3 patentsUS7571404B2Aug 4, 2009
Fast on-chip decoupling capacitance budgeting method and device for reduced power supply noise
FREESCALE SEMICONDUCTOR INC15 citations82
US9465899B2Oct 11, 2016
Method for provisioning decoupling capacitance in an integrated circuit
FREESCALE SEMICONDUCTOR INC4 citations62
US9264040B2Feb 16, 2016
Low leakage CMOS cell with low voltage swing
FREESCALE SEMICONDUCTOR INC0 citations37