Inventor
HSIA WEI-JEN
US36 patents
⚠️ This page may combine multiple inventors who share the name “HSIA WEI-JEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
LSI LOGIC CORP
32 patentsUS6423628B1Jul 23, 2002
Method of forming integrated circuit structure having low dielectric constant material and having silicon oxynitride caps over closely spaced apart metal lines
LSI LOGIC CORP218 citations99
US6204192B1Mar 20, 2001
Plasma cleaning process for openings formed in at least one low dielectric constant insulation layer over copper metallization in integrated circuit structures
LSI LOGIC CORP166 citations99
US6881664B2Apr 19, 2005
Process for planarizing upper surface of damascene wiring structure for integrated circuit structures
LSI LOGIC CORP75 citations98
US6232658B1May 15, 2001
Process to prevent stress cracking of dielectric films on semiconductor wafers
LSI LOGIC CORP93 citations98
US6537896B1Mar 25, 2003
Process for treating porous low k dielectric material in damascene structure to form a non-porous dielectric diffusion barrier on etched via and trench surfaces in the porous low k dielectric material
LSI LOGIC CORP71 citations96
US6423630B1Jul 23, 2002
Process for forming low K dielectric material between metal lines
LSI LOGIC CORP66 citations96
US6147012ANov 14, 2000
Process for forming low k silicon oxide dielectric material while suppressing pressure spiking and inhibiting increase in dielectric constant
LSI LOGIC CORP52 citations96
US6114259ASep 5, 2000
Process for treating exposed surfaces of a low dielectric constant carbon doped silicon oxide dielectric material to protect the material from damage
LSI LOGIC CORP218 citations95
US5278103AJan 11, 1994
Method for the controlled formation of voids in doped glass dielectric films
LSI LOGIC CORP82 citations95
US6528423B1Mar 4, 2003
Process for forming composite of barrier layers of dielectric material to inhibit migration of copper from copper metal interconnect of integrated circuit structure into adjacent layer of low k dielectric material
LSI LOGIC CORP48 citations93
US6492731B1Dec 10, 2002
Composite low dielectric constant film for integrated circuit structure
LSI LOGIC CORP27 citations93
US6812134B1Nov 2, 2004
Dual layer barrier film techniques to prevent resist poisoning
LSI LOGIC CORP19 citations92
US6774057B1Aug 10, 2004
Method and structure for forming dielectric layers having reduced dielectric constants
LSI LOGIC CORP22 citations92
US6756674B1Jun 29, 2004
Low dielectric constant silicon oxide-based dielectric layer for integrated circuit structures having improved compatibility with via filler materials, and method of making same
LSI LOGIC CORP36 citations92
US6503840B2Jan 7, 2003
Process for forming metal-filled openings in low dielectric constant dielectric material while inhibiting via poisoning
LSI LOGIC CORP40 citations92
US6346490B1Feb 12, 2002
Process for treating damaged surfaces of low k carbon doped silicon oxide dielectric material after plasma etching and plasma cleaning steps
LSI LOGIC CORP53 citations92
US6297555B1Oct 2, 2001
Method to obtain a low resistivity and conformity chemical vapor deposition titanium film
LSI LOGIC CORP22 citations92
US6204550B1Mar 20, 2001
Method and composition for reducing gate oxide damage during RF sputter clean
LSI LOGIC CORP20 citations92
US5994211ANov 30, 1999
Method and composition for reducing gate oxide damage during RF sputter clean
LSI LOGIC CORP20 citations92
US5895267AApr 20, 1999
Method to obtain a low resistivity and conformity chemical vapor deposition titanium film
LSI LOGIC CORP20 citations92
US6686272B1Feb 3, 2004
Anti-reflective coatings for use at 248 nm and 193 nm
LSI LOGIC CORP20 citations91
US5789028AAug 4, 1998
Method for eliminating peeling at end of semiconductor substrate in metal organic chemical vapor deposition of titanium nitride
LSI LOGIC CORP17 citations84
US5719084AFeb 17, 1998
Method for the controlled formation of voids in doped glass dielectric films
LSI LOGIC CORP16 citations81
US6930056B1Aug 16, 2005
Plasma treatment of low dielectric constant dielectric material to form structures useful in formation of metal interconnects and/or filled vias for integrated circuit structure
LSI LOGIC CORP10 citations74
US6790784B2Sep 14, 2004
Plasma treatment of low dielectric constant dielectric material to form structures useful in formation of metal interconnects and/or filled vias for intergrated circuit structure
LSI LOGIC CORP12 citations74
US6613665B1Sep 2, 2003
Process for forming integrated circuit structure comprising layer of low k dielectric material having antireflective properties in an upper surface
LSI LOGIC CORP7 citations74
US7081406B2Jul 25, 2006
Interconnect dielectric tuning
LSI LOGIC CORP4 citations63
US7029591B2Apr 18, 2006
Planarization with reduced dishing
LSI LOGIC CORP3 citations63
US6794756B2Sep 21, 2004
Integrated circuit structure having low dielectric constant material and having silicon oxynitride caps over closely spaced apart metal lines
LSI LOGIC CORP5 citations63
US7071094B2Jul 4, 2006
Dual layer barrier film techniques to prevent resist poisoning
LSI LOGIC CORP4 citations62
US6420277B1Jul 16, 2002
Process for inhibiting crack formation in low dielectric constant dielectric films of integrated circuit structure
LSI LOGIC CORP5 citations59
US7064062B2Jun 20, 2006
Incorporating dopants to enhance the dielectric properties of metal silicates
LSI LOGIC CORP1 citations52
LSI CORP
4 patentsUS7393780B2Jul 1, 2008
Dual layer barrier film techniques to prevent resist poisoning
LSI CORP7 citations73
US7220362B2May 22, 2007
Planarization with reduced dishing
LSI CORP2 citations63
US7312127B2Dec 25, 2007
Incorporating dopants to enhance the dielectric properties of metal silicates
LSI CORP1 citations52
US7259462B1Aug 21, 2007
Interconnect dielectric tuning
LSI CORP0 citations52