Inventor

GOKMEN TAYFUN

US70 patents

⚠️ This page may combine multiple inventors who share the name “GOKMEN TAYFUN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GOKMEN TAYFUN

IBM

Convolutional neural networks using resistive processing unit array

Circuit methodology for highly linear and symmetric resistive processing unit

In-cell differential read-out circuitry for reading signed weight values in resistive processing unit architecture

Killing asymmetric resistive processing units for neural network training

Circuit methodology for highly linear and symmetric resistive processing unit

Resistive processing unit

Architecture for enabling zero value shifting

Convolutional neural networks using resistive processing unit array

Resistive processing unit

Polarization free gallium nitride-based photonic devices on nanopatterned silicon

Hybrid CZTSSe photovoltaic device

Solar cell characteristics determination

Solar cell characteristics determination

DNN training with asymmetric RPU devices

Scalable architecture for implementing maximization algorithms with resistive devices

Resistive processing unit architecture with separate weight update and inference circuitry

Killing asymmetric resistive processing units for neural network training

Circuit methodology for highly linear and symmetric resistive processing unit

Computer architecture with resistive processing units

Parasitic voltage drop compensation in large cross-point arrays

Resistive processing unit with hysteretic updates for neural network training

Scalable architecture for implementing maximization algorithms with resistive devices

Suppressing undesired programming at half-selected devices in a crosspoint array of 3-terminal resistive memory

Alignment techniques to match symmetry point as zero-weight point in analog crosspoint arrays

Acceleration of convolutional neural networks on analog arrays

Noise and signal management for RPU array

Training DNN by updating an array using a chopper

Area and power efficient implementation of resistive processing units using complementary metal oxide semiconductor technology

Area and power efficient implementation of resistive processing units using complementary metal oxide semiconductor technology

Resistive crossbar arrays with reduced numbers of elements

Copying weights between resistive cross-point arrays

Voltage control of learning rate for RPU devices for deep neural network training

Filtering hidden matrix training DNN

Hardware acceleration for computing eigenpairs of a matrix

Dynamic configuration of readout circuitry for different operations in analog resistive crossbar array

Computer architecture with resistive processing units

Circuit methodology for highly linear and symmetric resistive processing unit

Dynamic management of weight update bit length

Eigenvalue decomposition with stochastic optimization

Hybrid CZTSSe photovoltaic device

Resistive processing unit with multiple weight readers

Circuit methodology for differential weight reading in resistive processing unit devices

Resistive processing units and neural network training methods

Sparse modifiable bit length deterministic pulse generation for updating analog crossbar arrays

Auto weight scaling for RPUs

Analog hardware matrix computation

Matrix sketching using analog crossbar architectures

Pulse generation for updating crossbar arrays

GOKMEN TAYFUN

Hall measurement system with rotary magnet

INT BUSINESS MACHINES INT

Scalable architecture for implementing maximization algorithms with resistive devices