Inventor

SRINIVASAN KRISHNAN

US54 patents

⚠️ This page may combine multiple inventors who share the name “SRINIVASAN KRISHNAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SRINIVASAN KRISHNAN

XILINX INC

Multi-use chip-to-chip interface

Systems and methods to transport memory mapped traffic amongst integrated circuit devices

IC with adaptive chip-to-chip interface to support different chip-to-chip

Data bus inversion using multiple transforms

Multi-use chip-to-chip interface

NoC routing in a multi-chip device

NoC buffer management for virtual channels

Distributed look-ahead routing in network-on-chip

On-demand packetization for a chip-to-chip interface

Integrated circuit transaction redundancy

Method and apparatus for memory management in a video processing system

System-level techniques for error correction in chip-to-chip interfaces

Interconnect circuitry for multi-channel and multi-requester memory systems

Methods to extend NoC interconnect across multiple dice in 3D

Localized and relocatable software placement and NoC-based access to memory controllers

Network-on-chip architecture for handling different data sizes

Dynamically allocated buffer pooling

Adaptive acceleration of transport layer security

MICROSOFT CORP

Interface infrastructure for creating and interacting with web services

Message state maintenance at a cursor

Queued sessions for communicating correlated messages over a network

Message state maintenance at a message log

Failed message error recovery using application specific error queues

Reliably transferring queued application messages

Monitoring message queues and starting processing applications

Reliably transferring queued application messages

Reliably transferring queued application messages

SRINIVASAN KRISHNAN

Various methods and apparatus for a memory scheduler with an arbiter

Various methods and apparatus for address tiling

Quality assessment of text derived from an audio signal

Various methods and apparatus for a memory scheduler with an arbiter

Various methods and apparatus for address tiling and channel interleaving throughout the integrated system

Performance software instrumentation and analysis for electronic design automation

Method and system for a database to monitor and analyze performance of an electronic design

Apparatus and methods to concurrently perform per-thread as well as per-tag memory access scheduling within a thread and across two or more threads

Interactive configuration-management-based diagramming tool

Gaming Analytics Inc

Machine-learning platform for operational decision making

Machine-learning platform for operational decision making

Machine-learning platform for marketing promotions decision making

MICROSOFT TECHNOLOGY LICENSING LLC

Scalable data feed system

Failure tolerant and explainable state machine driven hypergraph execution

Cluster views for compute scale and cache preservation

TEXAS INSTRUMENTS INC

Concurrent design tradeoff analysis system and method

Concurrent design tradeoff analysis system and method

CHKODROV GUEORGUI

Distributed messaging system with configurable assurances

Durable exactly once message delivery at scale

DE LESCURE BENOIT

Apparatus and methods for on layer concurrency in an integrated circuit

BHEEMARAJAIAH ANAND

Scalable data feed system

COGNIZANT TECH SOLUTIONS INDIA PVT LTD

System and a method for automated resolution of configuration item issues

LSI CORP

System for execution of security related functions