Inventor

ABELLANAS ENRIC HERRERO

ES3 patents

⚠️ This page may combine multiple inventors who share the name “ABELLANAS ENRIC HERRERO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

2 patents

US9071281B2Jun 30, 2015

Selective provision of error correction for memory

INTEL CORP10 citations81

US9075904B2Jul 7, 2015

Vulnerability estimation for cache memory

INTEL CORP3 citations60

MONCHIERO MATTEO

1 patent

US9608922B2Mar 28, 2017

Traffic control on an on-chip network

MONCHIERO MATTEO1 citations48