Inventor

TURAKHIA RITESH P

US2 patents

⚠️ This page may combine multiple inventors who share the name “TURAKHIA RITESH P”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LSI CORP

1 patent

US8352818B2Jan 8, 2013

Method for generating test patterns for small delay defects

LSI CORP4 citations57

LSI LOGIC CORP

1 patent

US7171638B2Jan 30, 2007

Methods of screening ASIC defects using independent component analysis of quiescent current measurements

LSI LOGIC CORP1 citations45