Inventor

LEE JUNE

US132 patents

⚠️ This page may combine multiple inventors who share the name “LEE JUNE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LEE JUNE

SAMSUNG ELECTRONICS CO LTD

Memory devices with page buffer having dual registers and method of using the same

NAND flash memory and method of erasing, programming, and copy-back programming thereof

Non-volatile semiconductor memory device having shared row selection circuit

Non-volatile semiconductor memory device using differential start programming voltage and programming method thereof

Memory devices with page buffer having dual registers and method of using the same

Method for preventing over-erasing of memory cells and flash memory device using the same

Internal voltage converter scheme for controlling the power-up slope of internal supply voltage

Semiconductor memory device

Flash memory device with a novel redundancy selection circuit and method of using the same

Synchronous read only memory device

Flash memory devices and methods for programming the same

Semiconductor memory device having flexible column redundancy scheme

Nonvolatile semiconductor memory device having selective multiple-speed operation mode

Read-only memory device having bit line discharge circuitry and method of reading data from the same

Program method of non-volatile memory device

Flash memory device capable of preventing program disturbance according to partial programming

Non-volatile memory devices that include a programming verification function

Non-volatile semiconductor memory device with accelerated column scanning scheme

Block architecture option circuit for nonvolatile semiconductor memory devices

Low-voltage non-volatile semiconductor memory device

MICRON TECHNOLOGY INC

System and memory for sequential multi-plane page memory operations

Asynchronous/synchronous interface

Programming and/or erasing a memory device in response to its program and/or erase history

External clock tracking pipelined latch scheme

Programming multilevel cell memory arrays

Systems, methods and devices for limiting current consumption upon power-up

Programming a non-volatile memory device

External clock tracking pipelined latch scheme

System and memory for sequential multi-plane page memory operations

Independent polling for multi-page programming

System and memory for sequential multi-plane page memory operations

SUN MICROSYSTEMS INC

Thin rack server

Computer housing

Drive bracket

Panel for a rack-mounted server

Alloy rack door

Computer system

SK HYNIX MEMORY SOLUTIONS INC

Read disturb reclaim policy

System optimization in flash memories

LEE JUNE

System and memory for sequential multi-plane page memory operations

Apparatus comparing verified data to original data in the programming of a memory array

(unassigned)

Touch screen cash register

LIFESCAN INC

Blood glucose monitoring system

CHEUNG GEORGE

Shoulder/neck supporting electronic application

BRISTOL MYERS CO

Container and delivery system for stick compositions

RubberStampede Partnership

Rubber stamp pad

NAT SEMICONDUCTOR CORPORATION

Card reader

SK HYNIX INC

Selective data recycling in non-volatile memory

INTEL CORP

Selective bit line precharging in non volatile memory

NOBUNAGA DEAN K

Asynchronous/synchronous interface