Inventor

MAFFITT THOMAS M

US35 patents

⚠️ This page may combine multiple inventors who share the name “MAFFITT THOMAS M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MAFFITT THOMAS M

IBM

Method and apparatus for increasing interchip communications rates

Integrated circuit capacitor

Automatic off-chip driver adjustment based on load characteristics

Method and apparatus for implementing concurrent multiple level sensing operation for resistive memory devices

Apparatus and method for implementing precise sensing of PCRAM devices

Writing multiple levels in a phase change memory using a write reference voltage that incrementally ramps over a write period

Writing multiple levels in a phase change memory

Circuit and method using distributed phase change elements for across-chip temperature profiling

Writing multiple levels in a phase change memory

DRAM word line voltage control to insure full cell writeback level

Complementary depletion switch body stack off-chip driver

Off-chip driver and receiver circuits for multiple voltage level DRAMs

Writing multiple levels in a phase change memory

Writing multiple levels in a phase change memory

Writing multiple levels in a phase change memory

TCAM structures with reduced power supply noise

Off chip driver (OCD) with variable drive capability for noise control

Voltage controlled transmission line with real-time adaptive control

Writing multiple levels in a phase change memory

Writing multiple levels in a phase change memory

Writing multiple levels in a phase change memory

Writing multiple levels in a phase change memory

Phase change memory with an incrementally ramped write-reference voltage and an incrementally ramped read-reference voltage

Writing multiple levels in a phase change memory using a write/read reference voltage ramping up over a write/read period

Method and apparatus for implementing self-referencing read operation for PCRAM devices

Precharging the write path of an MRAM device for fast write operation

Writing multiple levels in a phase change memory

Non volatile cell and architecture with single bit random access read, program and erase

GLOBALFOUNDRIES INC

Offset-cancelling self-reference STT-MRAM sense amplifier

Content-addressable memory having multiple reference matchlines to reduce latency

Matchline precharge architecture for self-reference matchline sensing

GABRIC JOHN A

Phase change memory cycle timer and method

Phase change memory cycle timer and method

FIFIELD JOHN A

Charge pump system and method utilizing adjustable output charge and compilation system and method for use by the charge pump

INFINEON TECHNOLOGIES AG

Wordline on and off voltage compensation circuit based on the array device threshold voltage