Inventor
SUNG KUO-TUNG
TW35 patents
⚠️ This page may combine multiple inventors who share the name “SUNG KUO-TUNG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
MOSEL VITELIC INC
25 patentsUS6194272B1Feb 27, 2001
Split gate flash cell with extremely small cell size
MOSEL VITELIC INC86 citations98
US6040216AMar 21, 2000
Method (and device) for producing tunnel silicon oxynitride layer
MOSEL VITELIC INC99 citations98
US6184093B1Feb 6, 2001
Method of implementing differential gate oxide thickness for flash EEPROM
MOSEL VITELIC INC61 citations96
US6469341B1Oct 22, 2002
Method and device for producing undercut gate for flash memory
MOSEL VITELIC INC59 citations94
US6414350B1Jul 2, 2002
EPROM cell having a gate structure with dual side-wall spacers of differential composition
MOSEL VITELIC INC23 citations92
US6255205B1Jul 3, 2001
High density programmable read-only memory employing double-wall spacers
MOSEL VITELIC INC35 citations92
US6242774B1Jun 5, 2001
Poly spacer split gate cell with extremely small cell size
MOSEL VITELIC INC26 citations92
US6136647AOct 24, 2000
Method of forming interpoly dielectric and gate oxide in a memory cell
MOSEL VITELIC INC25 citations92
US6054350AApr 25, 2000
EPROM cell having a gate structure with sidewall spacers of differential composition
MOSEL VITELIC INC23 citations92
US6044018AMar 28, 2000
Single-poly flash memory cell for embedded application and related methods
MOSEL VITELIC INC41 citations92
US5963806AOct 5, 1999
Method of forming memory cell with built-in erasure feature
MOSEL VITELIC INC32 citations92
US5783473AJul 21, 1998
Structure and manufacturing process of a split gate flash memory unit
MOSEL VITELIC INC25 citations92
US6136653AOct 24, 2000
Method and device for producing undercut gate for flash memory
MOSEL VITELIC INC31 citations91
US6365455B1Apr 2, 2002
Flash memory process using polysilicon spacers
MOSEL VITELIC INC21 citations90
US6261903B1Jul 17, 2001
Floating gate method and device
MOSEL VITELIC INC41 citations89
US6083792AJul 4, 2000
Manufacturing process of a split gate flash memory unit
MOSEL VITELIC INC16 citations84
US6440796B2Aug 27, 2002
Poly spacer split gate cell with extremely small cell size
MOSEL VITELIC INC11 citations74
US6265754B1Jul 24, 2001
Covered slit isolation between integrated circuit devices
MOSEL VITELIC INC7 citations74
US6165843ADec 26, 2000
Covered slit isolation between integrated circuit devices
MOSEL VITELIC INC11 citations74
US6121116ASep 19, 2000
Flash memory device isolation method and structure
MOSEL VITELIC INC8 citations74
US6093627AJul 25, 2000
Self-aligned contact process using silicon spacers
MOSEL VITELIC INC13 citations74
US6057197AMay 2, 2000
Isolation scheme to prevent field oxide edge from oxide loss
MOSEL VITELIC INC7 citations74
US5917214AJun 29, 1999
Split gate flash memory unit
MOSEL VITELIC INC8 citations74
US5789296AAug 4, 1998
Method for manufacturing split gate flash memory
MOSEL VITELIC INC11 citations74
US6331721B1Dec 18, 2001
Memory cell with built in erasure feature
MOSEL VITELIC INC13 citations73
UNITED INTEGRATED CIRCUITS CORP
3 patentsUS6033968AMar 7, 2000
Method for forming a shallow trench isolation structure
UNITED INTEGRATED CIRCUITS CORP9 citations74
US6238977B1May 29, 2001
Method for fabricating a nonvolatile memory including implanting the source region, forming the first spacers, implanting the drain regions, forming the second spacers, and forming a source line on the source and second spacers
UNITED INTEGRATED CIRCUITS CORP5 citations63
US6110796AAug 29, 2000
Method of improving junction leakage problem of shallow trench isolation by covering said STI with an insulating layer during salicide process
UNITED INTEGRATED CIRCUITS CORP5 citations63