Inventor

BABA SHIRO

JP62 patents

⚠️ This page may combine multiple inventors who share the name “BABA SHIRO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BABA SHIRO

HITACHI LTD

Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein

Microcomputer

Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein

Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein

Microcomputer having 16 bit fixed length instruction format

Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein

Microprocessor having a DSP and a CPU and a decoder discriminating between DSP-type instructions and CUP-type instructions

Data line disturbance free memory block divided flash memory and microcomputer having flash memory

Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein

Semiconductor IC device having a control register for designating memory blocks for erasure

System for maintaining fixed-point data alignment within a combination CPU and DSP system

Single-chip microcomputer including non-volatile memory elements

Data processing system for development of outline fonts

Register bank change including register to register transfer in a data processing system

Instruction format for program control type data processing systems

Microcomputer

Central processing unit having instruction queue of 32-bit length fetching two instructions of 16-bit fixed length in one instruction fetch operation

Method for flexibly developing a data processing system comprising rewriting instructions in non-volatile memory elements after function check indicates failure of required functions

Microprocessor and method for setting up its peripheral functions

Microprogram controlled microprocessor having a selectively expandable instruction code length including independent description of operand addressing and a type of operation for an operand by single instruction in a common coding scheme

Data memory system

Data processing device having an expandable address space

Microprocessor

Microcomputer including a flash memory that is two-way programmable

Method of erasing and programming a flash memory in a single-chip microcomputer having a processing unit and memory

Microcomputer having variable bit width area for displacement and circuit for handling immediate data larger than instruction word

Central processing unit having instruction queue of 32-bit length fetching two instructions of 16-bit fixed length in one instruction fetch operation

Semiconductor integrated circuit device having an electrically erasable and programmable nonvolatile memory and a built-in processing unit

Microcomputer having variable bit width area for displacement and circuit for handling immediate data larger than instruction word

Division circuit and the division method thereof

Single-chip semiconductor integrated circuit device and microcomputer integrated on a semiconductor chip

Data Processor

Data processor

Single-chip microcomputer having an expandable address area

Data processor with fast break in program execution by selectively processing either external control signal or external interrupt

Microcomputer

Single-chip microcomputer

Semiconductor integrated circuit device having a wiring layout to avoid intersections between analog signal wiring layers and digital signal wiring layers

Microcomputer and dividing circuit

Microcomputer having variable bit width area for displacement

Data processor providing fast break in program execution

Data processor providing fast break in program execution

Integrated data processor having mode control register for controlling operation mode of serial communication unit

RENESAS TECH CORP

Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein

Microcomputer

Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein

Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein

Method for manufacturing a printed board on which a semiconductor device having two modes is mounted

Microcomputer and dividing circuit

HITACHI ULSI SYS CO LTD

Data line disturbance free memory block divided flash memory and microcomputer having flash memory therein