Inventor
MITCHELL PETER H
US44 patents
⚠️ This page may combine multiple inventors who share the name “MITCHELL PETER H”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
42 patentsUS6875703B1Apr 5, 2005
Method for forming quadruple density sidewall image transfer (SIT) structures
IBM286 citations99
US6713835B1Mar 30, 2004
Method for manufacturing a multi-level interconnect structure
IBM297 citations99
US7135773B2Nov 14, 2006
Integrated circuit chip utilizing carbon nanotube composite interconnection vias
IBM49 citations96
US6342735B1Jan 29, 2002
Dual use alignment aid
IBM84 citations96
US7691720B2Apr 6, 2010
Vertical nanotube semiconductor device structures and methods of forming the same
IBM22 citations93
US7585614B2Sep 8, 2009
Sub-lithographic imaging techniques and processes
IBM28 citations93
US7271444B2Sep 18, 2007
Wrap-around gate field effect transistor
IBM16 citations93
US7229909B2Jun 12, 2007
Integrated circuit chip utilizing dielectric layer having oriented cylindrical voids formed from carbon nanotubes
IBM24 citations93
US7088422B2Aug 8, 2006
Moving lens for immersion optical lithography
IBM29 citations93
US7038299B2May 2, 2006
Selective synthesis of semiconducting carbon nanotubes
IBM40 citations93
US7535016B2May 19, 2009
Vertical carbon nanotube transistor integration
IBM33 citations92
US7473633B2Jan 6, 2009
Method for making integrated circuit chip having carbon nanotube composite interconnection vias
IBM29 citations92
US7211844B2May 1, 2007
Vertical field effect transistors incorporating semiconducting nanotubes grown in a spacer-defined passage
IBM16 citations92
US6970372B1Nov 29, 2005
Dual gated finfet gain cell
IBM37 citations92
US6890828B2May 10, 2005
Method for supporting a bond pad in a multilevel interconnect structure and support structure formed thereby
IBM26 citations92
US7374793B2May 20, 2008
Methods and structures for promoting stable synthesis of carbon nanotubes
IBM31 citations91
US6989308B2Jan 24, 2006
Method of forming FinFET gates without long etches
IBM24 citations91
US7829883B2Nov 9, 2010
Vertical carbon nanotube field effect transistors and arrays
IBM10 citations84
US7674674B2Mar 9, 2010
Method of forming a dual gated FinFET gain cell
IBM13 citations84
US7566613B2Jul 28, 2009
Method of forming a dual gated FinFET gain cell
IBM11 citations84
US7273794B2Sep 25, 2007
Shallow trench isolation fill by liquid phase deposition of SiO2
IBM13 citations84
US7560347B2Jul 14, 2009
Methods for forming a wrap-around gate field effect transistor
IBM5 citations74
US7439081B2Oct 21, 2008
Method for making integrated circuit chip utilizing oriented carbon nanotube conductive layers
IBM6 citations74
US7329567B2Feb 12, 2008
Vertical field effect transistors incorporating semiconducting nanotubes grown in a spacer-defined passage
IBM6 citations74
US7129097B2Oct 31, 2006
Integrated circuit chip utilizing oriented carbon nanotube conductive layers
IBM9 citations74
US7026259B2Apr 11, 2006
Liquid-filled balloons for immersion lithography
IBM7 citations74
US6998204B2Feb 14, 2006
Alternating phase mask built by additive film deposition
IBM9 citations74
US7385673B2Jun 10, 2008
Immersion lithography with equalized pressure on at least projection optics component and wafer
IBM4 citations63
US7264415B2Sep 4, 2007
Methods of forming alternating phase shift masks having improved phase-shift tolerance
IBM4 citations63
US7250347B2Jul 31, 2007
Double-gate FETs (Field Effect Transistors)
IBM6 citations63
US6875685B1Apr 5, 2005
Method of forming gas dielectric with support structure
IBM5 citations63
US7109546B2Sep 19, 2006
Horizontal memory gain cells
IBM2 citations62
US7027125B2Apr 11, 2006
System and apparatus for photolithography
IBM4 citations61
US7820502B2Oct 26, 2010
Methods of fabricating vertical carbon nanotube field effect transistors for arrangement in arrays and field effect transistors and arrays formed thereby
IBM3 citations60
US7989222B2Aug 2, 2011
Method of making integrated circuit chip utilizing oriented carbon nanotube conductive layers
IBM0 citations52
US7889317B2Feb 15, 2011
Immersion lithography with equalized pressure on at least projection optics component and wafer
IBM0 citations52
US7851064B2Dec 14, 2010
Methods and structures for promoting stable synthesis of carbon nanotubes
IBM0 citations52
US7786583B2Aug 31, 2010
Integrated circuit chip utilizing oriented carbon nanotube conductive layers
IBM0 citations52
US7525156B2Apr 28, 2009
Shallow trench isolation fill by liquid phase deposition of SiO2
IBM0 citations52
US7435653B2Oct 14, 2008
Methods for forming a wrap-around gate field effect transistor
IBM0 citations52
US6369397B1Apr 9, 2002
SPM base focal plane positioning
IBM1 citations52
US7271878B2Sep 18, 2007
Wafer cell for immersion lithography
IBM0 citations48
SEMIVATION LLC
2 patentsUS10589445B1Mar 17, 2020
Method of cleaving a single crystal substrate parallel to its active planar surface and method of using the cleaved daughter substrate
SEMIVATION LLC2 citations69
US11978820B2May 7, 2024
Thin single-crystal silicon solar cells mounted to a structural support member and method of fabricating
SEMIVATION LLC0 citations48