Inventor

KESHAVARZI ALI

US70 patents

⚠️ This page may combine multiple inventors who share the name “KESHAVARZI ALI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KESHAVARZI ALI

INTEL CORP

Floating-body memory cell write

Floating-body DRAM using write word line for increased retention time

Differential circuits employing forward body bias

Multiple well transistor circuits having forward body bias

Purge-based floating body memory

OTP antifuse cell and cell array

Circuit including forward body bias from supply voltage and ground nodes

Software control of transistor body bias in controlling chip parameters

Employing transistor body bias in controlling chip parameters

Dual threshold SRAM cell for single-ended sensing

Circuit including forward body bias from supply voltage and ground nodes

Transistor group mismatch detection and reduction

Transistors providing desired threshold voltage and reduced short channel effects with forward body bias

Dual Vt SRAM cell with bitline leakage control

Forward body biased field effect transistor providing decoupling capacitance

Capacitor, method of increasing a capacitance area of same, and system containing same

2-transistor floating-body dram

Dual gate oxide one time programmable (OTP) antifuse cell

Apparatus and method for programming a memory array

1P1N 2T gain cell

Floating-body dynamic random access memory and method of fabrication in tri-gate technology

Method and apparatus for adjusting the threshold of a CMOS radiation-measuring circuit

Memory cell driver circuits

Two transistor gain cell, method, and system

Crosspoint memory array utilizing one time programmable antifuse cells

Apparatus and method for a one-phase write to a one-transistor memory cell array

Floating-body DRAM using write word line for increased retention time

Silicon on insulator device design having improved floating body effect

Carbon nanotube fuse element

Low frequency testing, leakage control, and burn-in control for high-performance digital circuits

Non volatile data storage through dielectric breakdown

Floating-body dynamic random access memory and method of fabrication in tri-gate technology

Overvoltage detection apparatus, method, and system

Floating-body dynamic random access memory with purge line

Floating-body dynamic random access memory with purge line

Decoupling capacitors for thin gate oxides

Insulated channel field effect transistor with an electric field terminal region

Method and apparatus for providing rotational burn-in stress testing

Logic circuits using carbon nanotube transistors

Selective cooling of an integrated circuit for minimizing power loss

Multiple parameter testing with improved sensitivity

Memory cell without halo implant

Operating an information storage cell array

Capacitor structure for a logic process

CYPRESS SEMICONDUCTOR CORP

Embedded SONOS with triple gate oxide and manufacturing method of the same

Hydrogen barriers in a copper interconnect process

TAIWAN SEMICONDUCTOR MFG

Integrated circuits and manufacturing methods thereof

DOYLE BRIAN S

Capacitor, method of increasing a capacitance area of same, and system containing same

KESHAVARZI ALI

Logic circuits using carbon nanotube transistors

Longitude Flash Memory Solutions Ltd

Bias scheme for word programming in non-volatile memory and inhibit disturb reduction