Inventor

AMINPUR MASSUD

FR17 patents

⚠️ This page may combine multiple inventors who share the name “AMINPUR MASSUD”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

AMINPUR MASSUD

ADVANCED MICRO DEVICES INC

Control trimming of hard mask for sub-100 nanometer transistor gate

Barrier layer for a copper metallization layer including a low-k dielectric

Technique for controlling mechanical stress in a channel region by spacer removal

Technique for creating different mechanical stress in different channel regions by forming an etch stop layer having differently modified intrinsic stress

Technique for forming a gate electrode by using a hard mask

Method of manufacturing multi-level contacts by sizing of contact sizes in integrated circuits

Photosensitive bottom anti-reflective coating

Technique for reducing etch damage during the formation of vias and trenches in interlayer dielectrics

System for forming a semiconductor device and method thereof

Channel isolation using dielectric isolation structures

Method of forming a hard mask for halo implants

Method of reducing photoresist shadowing during angled implants

Simultaneous formation of device and backside contacts on wafers having a buried insulator layer

Semiconductor device and method for lowering miller capacitance by modifying source/drain extensions for high speed microprocessors

Method of forming a gate electrode on a semiconductor device and a device incorporating same

FROHBERG KAI

Technique for enhancing the fill capabilities in an electrochemical deposition process by edge rounding of trenches

GLOBALFOUNDRIES INC

Technique for enhancing process flexibility during the formation of vias and trenches in low-k interlayer dielectrics