Inventor
KELLER ERIC R
US30 patents
⚠️ This page may combine multiple inventors who share the name “KELLER ERIC R”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
XILINX INC
26 patentsUS6725441B1Apr 20, 2004
Method and apparatus for defining and modifying connections between logic cores implemented on programmable logic devices
XILINX INC148 citations99
US6487709B1Nov 26, 2002
Run-time routing for programmable logic devices
XILINX INC238 citations99
US7328335B1Feb 5, 2008
Bootable programmable logic device for internal decoding of encoded configuration data
XILINX INC94 citations98
US6920627B2Jul 19, 2005
Reconfiguration of a programmable logic device using internal control
XILINX INC216 citations97
US7185309B1Feb 27, 2007
Method and apparatus for application-specific programmable memory architecture and interconnection network on a chip
XILINX INC51 citations96
US7689726B1Mar 30, 2010
Bootable integrated circuit device for readback encoding of configuration data
XILINX INC53 citations94
US7653895B1Jan 26, 2010
Memory arrangement for message processing by a plurality of threads
XILINX INC23 citations93
US7131077B1Oct 31, 2006
Using an embedded processor to implement a finite state machine
XILINX INC28 citations93
US7574680B1Aug 11, 2009
Method and apparatus for application-specific programmable memory architecture and interconnection network on a chip
XILINX INC35 citations92
US7552042B1Jun 23, 2009
Method for message processing on a programmable logic device
XILINX INC26 citations92
US7386826B1Jun 10, 2008
Using redundant routing to reduce susceptibility to single event upsets in PLD designs
XILINX INC17 citations92
US7228520B1Jun 5, 2007
Method and apparatus for a programmable interface of a soft platform on a programmable logic device
XILINX INC37 citations92
US7111215B1Sep 19, 2006
Methods of reducing the susceptibility of PLD designs to single event upsets
XILINX INC15 citations92
US6883147B1Apr 19, 2005
Method and system for generating a circuit design including a peripheral component connected to a bus
XILINX INC52 citations92
US7227378B2Jun 5, 2007
Reconfiguration of a programmable logic device using internal control
XILINX INC15 citations91
US7990867B1Aug 2, 2011
Pipeline for processing network packets
XILINX INC9 citations84
US7823162B1Oct 26, 2010
Thread circuits and a broadcast channel in programmable logic
XILINX INC9 citations84
US7770179B1Aug 3, 2010
Method and apparatus for multithreading on a programmable logic device
XILINX INC16 citations84
US7698449B1Apr 13, 2010
Method and apparatus for configuring a processor embedded in an integrated circuit for use as a logic element
XILINX INC9 citations84
US7028283B1Apr 11, 2006
Method of using a hardware library in a programmable logic device
XILINX INC11 citations84
US7010664B1Mar 7, 2006
Configurable address generator and circuit using same
XILINX INC10 citations74
US7784014B1Aug 24, 2010
Generation of a specification of a network packet processor
XILINX INC7 citations73
US8032874B1Oct 4, 2011
Generation of executable threads having source code specifications that describe network packets
XILINX INC4 citations63
US7792117B1Sep 7, 2010
Method for simulating a processor of network packets
XILINX INC6 citations63
US7788402B1Aug 31, 2010
Circuit for modification of a network packet by insertion or removal of a data segment
XILINX INC3 citations63
US7076596B1Jul 11, 2006
Method of and apparatus for enabling a hardware module to interact with a data structure
XILINX INC3 citations63