Inventor

HIRAISHI ATSUSHI

JP60 patents

⚠️ This page may combine multiple inventors who share the name “HIRAISHI ATSUSHI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HIRAISHI ATSUSHI

HITACHI LTD

SRAM having load transistor formed above driver transistor

Semiconductor device having semiconductor elements formed in a retrograde well structure

Process for fabricating a semiconductor integrated circuit device

Sense amplifier circuit

High speed, low noise output buffer with non-identical pairs of output transistors

Semiconductor memory device having a redundancy capability

Semiconductor integrated circuit device and process for fabricating the same

Semiconductor integrated circuit device and process for fabricating the same

Method of manufacturing semiconductor integrated circuit device

Sense amplifier circuit

Semiconductor circuit device having a plurality of SRAM type memory cell arrangement

Process for fabricating a semiconductor integrated circuit device

Signal transition detector circuit

Semiconductor integrated circuit device and process for fabricating the same

Semiconductor device

Method of manufacturing a semiconductor integrated circuit device

Semiconductor device

Synchronous memory unit

Semiconductor integrated circuit device and process for fabricating the same

Semiconductor device

Semiconductor integrated circuit having logic gates

Static RAM

Semiconductor integrated circuit device

Semiconductor device

Semiconductor integrated circuit having logi gates

Semiconductor integrated circuit having logic gates

MOS field effect transistor device with buried channel

Sense amplifier circuit

ELPIDA MEMORY INC

Memory module

Memory module including plural memory devices and data register buffer

Signal transmission circuit and characteristic adjustment method thereof, memory module, and manufacturing method of circuit board

Stacked-type semiconductor package

Semiconductor package with bypass capacitor

Stacked-type semiconductor package

MICRON TECHNOLOGY INC

Timing control for input receiver

Timing control for input receiver

Apparatuses and methods for a memory device with dual common data I/O lines

Timing control for input receiver

Apparatuses and methods for a memory device with dual common data I/O lines

KAO CORP

Method for producing semiconducting single-walled carbon nanotube dispersion

Method for producing semiconducting single-walled carbon nanotube dispersion

Powder composition for paper manufacturing

Method for producing semiconducting single-walled carbon nanotube dispersion

SAITO SHUNICHI

Load reduced memory module and memory system including the same

Multi-layer printed wiring board

HIRAISHI ATSUSHI

Address line wiring structure and printed wiring board having same

Apparatus having a wiring board and memory devices

PS4 LUXCO SARL

Semiconductor device having ODT function

NISHIO YOJI

Memory module, method for using same and memory system

PANASONIC CORP

Negative electrode for non-aqueous electrolyte secondary battery, and non-aqueous electrolyte secondary battery