Inventor

ARNOLD JOHN C

US42 patents

⚠️ This page may combine multiple inventors who share the name “ARNOLD JOHN C”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ARNOLD JOHN C

IBM

Formation of embedded magnetic random-access memory devices

Formation of embedded magnetic random-access memory devices with multi-level bottom electrode via contacts

Lithographic alignment of a conductive line to a via

High performance CMOS circuits, and methods for fabricating same

Methods to mitigate plasma damage in organosilicate dielectrics using a protective sidewall spacer

Alternating hardmasks for tight-pitch line formation

Multi-layer encapsulation to enable endpoint-based process control for embedded memory fabrication

MRAM device formation with in-situ encapsulation

Alternating hardmasks for tight-pitch line formation

Low-temperature electrically activated gate electrode and method of fabricating same

Semiconductor device structure having low and high performance devices of same conductive type on same substrate

Method for fabricating a semiconductor device including self-aligned top via formation at line ends

Self-aligned top via

Selective patterning of vias with hardmasks

Selective patterning of vias with hardmasks

Extreme ultraviolet lithography for high volume manufacture of a semiconductor device

Method of forming field effect transistor (FET) circuits, and forming integrated circuit (IC) chips with the FET circuits

Rework of patterned dielectric and metal hardmask films

Multilayer hardmask for high performance MRAM devices

Multilayer hardmask for high performance MRAM devices

ARNOLD JOHN C

Dual hard mask lithography process

Sidewall image transfer process employing a cap material layer for a metal nitride layer

Mask and etch process for pattern assembly

Methods to mitigate plasma damage in organosilicate dielectrics

Tone inversion with partial underlayer etch for semiconductor device formation

Methods to mitigate plasma damage in organosilicate dielectrics

Transistor devices and methods of making

Methods to mitigate plasma damage in organosilicate dielectrics using a protective sidewall spacer

Method for forming small dimension openings in the organic masking layer of tri-layer lithography

Film stack including metal hardmask layer for sidewall image transfer fin field effect transistor formation

Film stack including metal hardmask layer for sidewall image transfer fin field effect transistor formation

Method of fabricating dual damascene structures using a multilevel multiple exposure patterning scheme

Transistor devices and methods of making

Manufacturing features of different depth by placement of vias

MOTOROLA INC

Inductively coupled plasma reactor and process

Method and apparatus for forming a layer on a substrate

Method and apparatus for forming a layer on a substrate

Process of forming a semiconductor device

Method for forming an inlaid via in a semiconductor device

YIN YUNPENG

Sidewall image transfer process

TESSERA INC

Alternating hardmasks for tight-pitch line formation

GLOBALFOUNDRIES INC

Dual hard mask lithography process