P

Inventor

BURNS SEAN D

US67 patents
⚠️ This page may combine multiple inventors who share the name “BURNS SEAN D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

26 patents
US9934970B1Apr 3, 2018

Self aligned pattern formation post spacer etchback in tight pitch configurations

IBM22 citations94
US9991156B2Jun 5, 2018

Self-aligned quadruple patterning (SAQP) for routing layouts including multi-track jogs

IBM15 citations93
US7320855B2Jan 22, 2008

Silicon containing TARC/barrier layer

IBM37 citations92
US10529569B2Jan 7, 2020

Self aligned pattern formation post spacer etchback in tight pitch configurations

IBM5 citations84
US10410875B2Sep 10, 2019

Alternating hardmasks for tight-pitch line formation

IBM4 citations84
US9779944B1Oct 3, 2017

Method and structure for cut material selection

IBM17 citations84
US9607886B1Mar 28, 2017

Self aligned conductive lines with relaxed overlay

IBM6 citations84
US7326442B2Feb 5, 2008

Antireflective composition and process of making a lithographic structure

IBM11 citations84
US7588879B2Sep 15, 2009

Graded spin-on organic antireflective coating for photolithography

IBM15 citations83
US10032632B2Jul 24, 2018

Selective gas etching for self-aligned pattern transfer

IBM4 citations82
US10957583B2Mar 23, 2021

Self-aligned quadruple patterning (SAQP) for routing layouts including multi-track jogs

IBM1 citations73
US10546774B2Jan 28, 2020

Self-aligned quadruple patterning (SAQP) for routing layouts including multi-track jogs

IBM3 citations73
US10388525B2Aug 20, 2019

Multi-angled deposition and masking for custom spacer trim and selected spacer removal

IBM3 citations73
US10312103B2Jun 4, 2019

Alternating hardmasks for tight-pitch line formation

IBM1 citations73
US10121661B2Nov 6, 2018

Self aligned pattern formation post spacer etchback in tight pitch configurations

IBM2 citations73
US10056290B2Aug 21, 2018

Self-aligned pattern formation for a semiconductor device

IBM2 citations73
US9852946B1Dec 26, 2017

Self aligned conductive lines

IBM2 citations73
US9786554B1Oct 10, 2017

Self aligned conductive lines

IBM5 citations73
US9773700B1Sep 26, 2017

Aligning conductive vias with trenches

IBM5 citations73
US7816069B2Oct 19, 2010

Graded spin-on organic antireflective coating for photolithography

IBM7 citations72
US8053368B2Nov 8, 2011

Method for removing residues from a patterned substrate

IBM3 citations63
US7914975B2Mar 29, 2011

Multiple exposure lithography method incorporating intermediate layer patterning

IBM3 citations63
US7439302B2Oct 21, 2008

Low refractive index polymers as underlayers for silicon-containing photoresists

IBM3 citations63
US7326523B2Feb 5, 2008

Low refractive index polymers as underlayers for silicon-containing photoresists

IBM3 citations63
US11646221B2May 9, 2023

Self-aligned pattern formation for a semiconductor device

IBM0 citations62
US11227793B2Jan 18, 2022

Self-aligned pattern formation for a semiconductor device

IBM0 citations62

ARNOLD JOHN C

4 patents

TESSERA INC

4 patents

TESSERA LLC

3 patents

ARNOLD JOHN CHRISTOPHER

2 patents

GOLDFARB DARIO L

2 patents

ADEIA SEMICONDUCTOR SOLUTIONS LLC

2 patents

BURNS SEAN D

2 patents

YIN YUNPENG

1 patent

RAGHUNATHAN SUDHARSHANAN

1 patent

ANGELOPOULOS MARIE

1 patent

BURKHARDT MARTIN

1 patent

BERNARD DALSIN MFG COMPANY

1 patent

Showing the top 50 of 67 patents by PatentIndex Score.