Inventor

LUSTIG NAFTALI E

US53 patents

⚠️ This page may combine multiple inventors who share the name “LUSTIG NAFTALI E”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LUSTIG NAFTALI E

IBM

In-situ endpoint detection and process monitoring method and apparatus for chemical-mechanical polishing

Interconnect scaling method including forming dielectric layer over subtractively etched first conductive layer and forming second conductive material on dielectric layer

Chemical-mechanical planarization of barriers or liners for copper metallurgy

Diamond-like carbon films from a hydrocarbon helium plasma

Elimination of photo-induced electrochemical dissolution in chemical mechanical polishing

In-situ endpoint detection method and apparatus for chemical-mechanical polishing using low amplitude input voltage

Diamond-like carbon films from a hydrocarbon helium plasma

Subtractive etch interconnects

Interconnect structure having subtractive etch feature and damascene feature

Interconnect structure having subtractive etch feature and damascene feature

Interconnect structure having substractive etch feature and damascene feature

High performance refractory metal / copper interconnects to eliminate electromigration

Selective local metal cap layer formation for improved electromigration behavior

Graphene and metal interconnects with reduced contact resistance

Graphene and metal interconnects

E-fuse with hybrid metallization

E-fuse structures and methods of manufacture

Electronic fuse having a damaged region

Oxygen assisted ohmic contact formation to n-type gallium arsenide

Oxygen assisted ohmic contact formation to N-type gallium arsenide

Chemical-mechanical planarization of barriers or liners for copper metallurgy

Laser planarization of zone 1 deposited metal films for submicron metal interconnects

Back end of line (BEOL) time dependent dielectric breakdown (TDDB) mitigation within a vertical interconnect access (VIA) level of an integrated circuit (IC) device

Back-end electrically programmable fuse

Bottom self-aligned via

Two-mask process for metal-insulator-metal capacitors and single mask process for thin film resistors

Selective local metal cap layer formation for improved electromigration behavior

Modified via bottom for beol via efuse

Selective local metal cap layer formation for improved electromigration behavior

Stacked via structure for metal fuse applications

High performance metal insulator metal capacitor

Interconnect architecture with enhanced reliability

Stacked via structure for metal fuse applications

Structures and methods for determining TDDB reliability at reduced spacings using the structures

Selective local metal cap layer formation for improved electromigration behavior

Stacked via structure for metal fuse applications

Modified via bottom for BEOL via efuse

Semiconductor having interconnects with improved mechanical properties by insertion of nanoparticles

GLOBALFOUNDRIES INC

Alternate dual damascene method for forming interconnects

Structure with air gap crack stop

Graphene-metal E-fuse

Detecting a void between a via and a wiring line

Hybrid graphene-metal interconnect structures

Forming air gap

BONILLA GRISELDA

Metal fuse structure for improved programming capability

Interconnect structure for integrated circuits having enhanced electromigration resistance

Method to resolve hollow metal defects in interconnects

E-fuse structures and methods of manufacture

FILIPPI RONALD G

Stacked via structure for metal fuse applications

BAO JUNJING

Back-end electrically programmable fuse