Inventor

SIMON ANDREW H

US89 patents

⚠️ This page may combine multiple inventors who share the name “SIMON ANDREW H”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SIMON ANDREW H

IBM

Copper interconnection structure incorporating a metal seed layer

Open-bottomed via liner structure and method for fabricating same

Interconnect scaling method including forming dielectric layer over subtractively etched first conductive layer and forming second conductive material on dielectric layer

Copper interconnection structure incorporating a metal seed layer

Copper recess process with application to selective capping and electroless plating

Device and methodology for reducing effective dielectric constant in semiconductor devices

Electromigration-resistant copper microstructure and process of making

Subtractive etch interconnects

Interconnect structure having subtractive etch feature and damascene feature

Device and methodology for reducing effective dielectric constant in semiconductor devices

Interconnect structure improvements

Graded composition diffusion barriers for chip wiring applications

Graded composition diffusion barriers for chip wiring applications

Interconnect structure for integrated circuits having improved electromigration characteristics

Copper recess process with application to selective capping and electroless plating

Bilayered metal hardmasks for use in Dual Damascene etch schemes

Electromigration-resistant copper microstructure

Method of forming a metal layer using an intermittent precursor gas flow process

Safe method for etching silicon dioxide

Interconnect structure having subtractive etch feature and damascene feature

Interconnect structure having substractive etch feature and damascene feature

High performance refractory metal / copper interconnects to eliminate electromigration

Selective local metal cap layer formation for improved electromigration behavior

Graphene and metal interconnects with reduced contact resistance

Graphene and metal interconnects

E-fuse with hybrid metallization

E-fuse structures and methods of manufacture

Electronic fuse having a damaged region

Electronic fuse vias in interconnect structures

Device and methodology for reducing effective dielectric constant in semiconductor devices

Structure and method of forming electrically blown metal fuses for integrated circuits

Constrained nanosecond laser anneal of metal interconnect structures

Copper interconnect with CVD liner and metallic cap

Bilayered metal hardmasks for use in dual damascene etch schemes

Device and methodology for reducing effective dielectric constant in semiconductor devices

Back-end electrically programmable fuse

Interconnect structure with enhanced reliability

GLOBALFOUNDRIES INC

Alternate dual damascene method for forming interconnects

Integrated circuit having improved electromigration performance and method of forming same

Interconnect structure and method of forming

Structure with air gap crack stop

BONILLA GRISELDA

Metal fuse structure for improved programming capability

Interconnect structure for integrated circuits having enhanced electromigration resistance

BAO JUNJING

Back-end electrically programmable fuse

Electronic anti-fuse

FILIPPI RONALD G

Stacked via structure for metal fuse applications

LI ZHENGWEN

Structure and method to make replacement metal gate and contact metal

EDELSTEIN DANIEL C

Reducing effective dielectric constant in semiconductor devices

INFINEON TECHNOLOGIES AG

Back end interconnect with a shaped interface

BAUMANN FRIEDER HAINRICH

Copper interconnect with CVD liner and metallic cap